| 6661121 |
Pulse generator with controlled output characteristics |
Eugene Nosowicz |
2003-12-09 |
| 6609228 |
Latch clustering for power optimization |
Paul H. Bergeron, Keith M. Carrig, Alvar A. Dean, David J. Hathaway, David E. Lackey +2 more |
2003-08-19 |
| 6509725 |
Self-regulating voltage divider for series-stacked voltage rails |
Kerry Bernstein, Peter E. Cottrell, Stephen V. Kosonocky, Edward J. Nowak |
2003-01-21 |
| 6493257 |
CMOS state saving latch |
Terry C. Coughlin, Jr., Steven F. Oakland, Douglas W. Stout |
2002-12-10 |
| 6421784 |
Programmable delay circuit having a fine delay element selectively receives input signal and output signal of coarse delay element |
Albert M. Chu, Daniel M. Dreps, Frank D. Ferraiolo, Kevin C. Gower |
2002-07-16 |
| 6335494 |
Multiple power distribution for delta-I noise reduction |
James P. Libous |
2002-01-01 |
| 6304122 |
Low power LSSD flip flops and a flushable single clock splitter for flip flops |
Steven F. Oakland, Toshiharu Saitoh, Sebastian T. Ventrone |
2001-10-16 |
| 6300809 |
Double-edge-triggered flip-flop providing two data transitions per clock cycle |
David J. Hathaway, David E. Lackey, Steven F. Oakland |
2001-10-09 |
| 6222407 |
Dual mode programmable delay element |
— |
2001-04-24 |
| 6204713 |
Method and apparatus for routing low-skew clock networks |
Janice M. Adams, Keith M. Carrig, Daniel R. Menard |
2001-03-20 |
| 6037677 |
Dual-pitch perimeter flip-chip footprint for high integration asics |
Robert A. Gottschall, James P. Libous |
2000-03-14 |
| 5920575 |
VLSI test circuit apparatus and method |
Steven F. Oakland |
1999-07-06 |
| 5760627 |
Low power CMOS latch |
Gary Francis Yenik |
1998-06-02 |
| 5710742 |
High density two port SRAM cell for low voltage CMOS applications |
Eric Lee Carter, Moon Ho Lee, Michael R. Ouellette |
1998-01-20 |
| 5084637 |
Bidirectional level shifting interface circuit |
— |
1992-01-28 |
