Issued Patents All Time
Showing 51–75 of 2,819 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12230544 | Stacked transistors with different channel widths | Lawrence A. Clevenger, Balasubramanian Pranatharthiharan, John H. Zhang | 2025-02-18 |
| 12224203 | Air gap spacer formation for nano-scale semiconductor devices | Thomas J. Haigh, Jr., Juntao Li, Eric G. Liniger, Sanjay C. Mehta, Son V. Nguyen +2 more | 2025-02-11 |
| 12219884 | Phase change memory with conductive rings | Carl Radens, Juntao Li, Ruilong Xie, Praneet Adusumilli, Oscar van der Straten +3 more | 2025-02-04 |
| 12219885 | Reducing contact resistance of phase change memory bridge cell | Juntao Li, Zuoguang Liu, Arthur Roy Gasasira | 2025-02-04 |
| 12211848 | Field effect transistors comprising a matrix of gate-all-around channels | Julien Frougier, Ruilong Xie, Chanro Park | 2025-01-28 |
| 12208386 | 3D nanochannel interleaved devices | Lawrence A. Clevenger, Donald F. Canaperi, Shawn P. Fetterolf | 2025-01-28 |
| 12210011 | Nanopore structures | — | 2025-01-28 |
| 12207570 | Phase change memory with multi-level programming | Ching-Tzu Chen, Juntao Li, Carl Radens | 2025-01-21 |
| 12191208 | Dual strained semiconductor substrate and patterning | Shogo Mochizuki, Juntao Li | 2025-01-07 |
| 12183740 | Stacked field-effect transistors | Ruilong Xie, Curtis S. Durfee, Jay William Strane, Min Gyu Sung, Julien Frougier +1 more | 2024-12-31 |
| 12176345 | Stacked FET with independent gate control | Ruilong Xie, Julien Frougier, Juntao Li, Chanro Park | 2024-12-24 |
| 12176416 | Stacked nanosheet transistor with defect free channel | Lan Yu, Heng Wu, Chen Zhang | 2024-12-24 |
| 12166110 | Nanosheet channel-to-source and drain isolation | Marc A. Bergendahl, Fee Li Lie, Eric R. Miller, John R. Sporre, Sean Teehan | 2024-12-10 |
| 12154971 | Forming nanosheet transistor using sacrificial spacer and inner spacers | Julien Frougier, Nicolas Loubet | 2024-11-26 |
| 12148663 | Tiered-profile contact for semiconductor | Kisik Choi | 2024-11-19 |
| 12150310 | Ferroelectric random-access memory cell | Julien Frougier, Ruilong Xie, Chanro Park, Min Gyu Sung | 2024-11-19 |
| 12136656 | Semiconductor structure having two-dimensional channel | Andrew Gaul, Julien Frougier, Ruilong Xie, Andrew M. Greene, Christopher J. Waskiewicz | 2024-11-05 |
| 12136573 | Fabrication of a vertical fin field effect transistor with reduced dimensional variations | — | 2024-11-05 |
| 12136655 | Backside electrical contacts to buried power rails | Ruilong Xie, Brent A. Anderson, Albert M. Young, Julien Frougier, Balasubramanian Pranatharthiharan +2 more | 2024-11-05 |
| 12132098 | Uniform interfacial layer on vertical fin sidewalls of vertical transport field-effect transistors | Shogo Mochizuki, Choonghyun Lee, Juntao Li | 2024-10-29 |
| 12119346 | Vertical field-effect transistor with wrap-around contact structure | Shogo Mochizuki, Juntao Li | 2024-10-15 |
| 12112782 | Compact MRAM architecture with magnetic bottom electrode | Julien Frougier, Karthik Yogendra, Dimitri Houssameddine, Ruilong Xie | 2024-10-08 |
| 12113067 | Forming N-type and P-type horizontal gate-all-around devices | Ruilong Xie, Juntao Li, Carl Radens | 2024-10-08 |
| 12107147 | Self-aligned gate contact for VTFETs | Huimei Zhou, Su Chen Fan, Miaomiao Wang | 2024-10-01 |
| 12107132 | Source/drain contact positioning under power rail | Ruilong Xie, Indira Seshadri, Eric R. Miller | 2024-10-01 |