Issued Patents 2024
Showing 51–75 of 80 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11996606 | Heterogeneous antenna in fan-out package | Po-Yao Chuang, Po-Hao Tsai | 2024-05-28 |
| 11996372 | Semiconductor device and method of manufacture | Po-Yao Chuang, Po-Hao Tsai | 2024-05-28 |
| 11990418 | Chip package structure with buffer structure and method for forming the same | Chin-Hua Wang, Po-Chen Lai, Ping-Tai CHEN, Che-Chia Yang, Yu-Sheng Lin +1 more | 2024-05-21 |
| 11984378 | Semiconductor package structure and method for forming the same | Shu-Shen Yeh, Po-Yao Lin, Chin-Hua Wang, Yu-Sheng Lin | 2024-05-14 |
| 11984405 | Pad structure design in fan-out package | Chen-Hua Yu, Der-Chyang Yeh, Hsien-Wei Chen | 2024-05-14 |
| 11984381 | Semiconductor package structure and method for forming the same | Po-Chen Lai, Ming-Chih Yew, Po-Yao Lin, Chin-Hua Wang | 2024-05-14 |
| 11978722 | Structure and formation method of package containing chip structure with inclined sidewalls | Shu-Shen Yeh, Po-Chen Lai, Che-Chia Yang, Li-Ling Liao, Po-Yao Lin | 2024-05-07 |
| 11973001 | Semiconductor device and method of manufacture | Shu-Shen Yeh, Chin-Hua Wang, Chia-Kuei Hsu, Po-Yao Lin | 2024-04-30 |
| 11967582 | Multi-chip device and method of formation | Chin-Hua Wang, Po-Chen Lai, Shu-Shen Yeh, Tsung-Yen Lee, Po-Yao Lin | 2024-04-23 |
| 11967547 | Solder resist structure to mitigate solder bridge risk | Chin-Hua Wang, Shu-Shen Yeh, Po-Chen Lai, Po-Yao Lin | 2024-04-23 |
| 11961779 | 3DIC packaging with hot spot thermal management features | Wensen Hung, Szu-Po Huang, Hsiang-Fan Lee, Kim Hong Chen, Chi-Hsi Wu | 2024-04-16 |
| 11955455 | Embedded stress absorber in package | Chien-Sheng Chen, Po-Yao Lin, Po-Chen Lai, Shu-Shen Yeh | 2024-04-09 |
| 11948892 | Formation method of chip package with fan-out feature | Po-Hao Tsai, Meng-Liang Lin, Po-Yao Chuang, Techi Wong | 2024-04-02 |
| 11948914 | Chip package structure with integrated device integrated beneath the semiconductor chip | Feng-Cheng Hsu, Shuo-Mao Chen | 2024-04-02 |
| 11942408 | Semiconductor structure and manufacturing method thereof | Shuo-Mao Chen, Feng-Cheng Hsu | 2024-03-26 |
| 11935842 | Methods of manufacturing an integrated circuit having stress tuning layer | Clinton Chao, Szu-Wei Lu | 2024-03-19 |
| 11915992 | Method for forming package structure with lid | Po-Yao Lin, Feng-Cheng Hsu, Shuo-Mao Chen, Chin-Hua Wang | 2024-02-27 |
| 11915991 | Semiconductor device having first heat spreader and second heat spreader and manufacturing method thereof | Shu-Shen Yeh, Po-Yao Lin, Yu-Sheng Lin, Po-Chen Lai | 2024-02-27 |
| 11908764 | Semiconductor package including a circuit substrate having a cavity and a floor plate embedded in a dielectric material and a semiconductor die disposed in the cavity | Meng-Liang Lin, Po-Yao Chuang, Te-Chi Wong, Shuo-Mao Chen | 2024-02-20 |
| 11908757 | Die corner removal for molding compound crack suppression in semiconductor die packaging and methods for forming the same | Chia-Kuei Hsu, Ming-Chih Yew, Shu-Shen Yeh, Po-Yao Lin | 2024-02-20 |
| 11901279 | Semiconductor package and method of manufacturing the same | Shih-Ting Hung, Meng-Liang Lin, Yi-Wen Wu, Po-Yao Chuang | 2024-02-13 |
| 11901307 | Semiconductor device including electromagnetic interference (EMI) shielding and method of manufacture | Po-Yao Chuang, Meng-Wei Chou | 2024-02-13 |
| 11901277 | Semiconductor package and method of manufacturing the same | Shih-Ting Hung, Meng-Liang Lin, Yi-Wen Wu, Po-Yao Chuang | 2024-02-13 |
| 11894320 | Semiconductor device package with stress reduction design and method of forming the same | Shu-Shen Yeh, Chin-Hua Wang, Po-Chen Lai, Po-Yao Lin | 2024-02-06 |
| 11887952 | Semiconductor device encapsulated by molding material attached to redistribution layer | Shuo-Mao Chen, Feng-Cheng Hsu | 2024-01-30 |