Issued Patents All Time
Showing 251–275 of 292 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9209045 | Fan out package structure and methods of forming | Pu Wang, Ying-Ching Shih, Jing-Cheng Lin | 2015-12-08 |
| 9111912 | 3D packages and methods for forming the same | Shih-Ting Lin, Kung-Chen Yeh, Jing-Cheng Lin | 2015-08-18 |
| 9064879 | Packaging methods and structures using a die attach film | Jui-Pin Hung, Jing-Cheng Lin, Nai-Wei Liu, Chin-Chuan Chang, Chen-Hua Yu +3 more | 2015-06-23 |
| 9024438 | Self-aligning conductive bump structure and method of making the same | Cheng-Lin Huang, I-Ting Chen, Ying-Ching Shih, Po-Hao Tsai, Jing-Cheng Lin +2 more | 2015-05-05 |
| 9006004 | Probing chips during package formation | Jing-Cheng Lin | 2015-04-14 |
| 8963334 | Die-to-die gap control for semiconductor structure and method | Jing-Cheng Lin, Ying-Ching Shih, Ying-Da Wang, Li-Chung Kuo, Long Hua Lee +2 more | 2015-02-24 |
| 8962392 | Underfill curing method using carrier | Chin-Fu Kao, Jing-Cheng Lin, Jui-Pin Hung | 2015-02-24 |
| 8946893 | Apparatus for dicing interposer assembly | Chung Yu Wang, Kung-Chen Yeh, Chih-Wei Wu, Jing-Cheng Lin | 2015-02-03 |
| 8871568 | Packages and method of forming the same | Ying-Ching Shih, Jing-Cheng Lin | 2014-10-28 |
| 8828848 | Die structure and method of fabrication thereof | Jing-Cheng Lin, Ying-Da Wang, Li-Chung Kuo | 2014-09-09 |
| 8779599 | Packages including active dies and dummy dies and methods for forming the same | Jing-Cheng Lin, Cheng-Lin Huang, Jui-Pin Hung, Shin-Puu Jeng, Chen-Hua Yu | 2014-07-15 |
| 8749077 | Three-dimensional integrated circuit (3DIC) | Chih-Wei Wu, Jing-Cheng Lin, Shin-Puu Jeng, Chen-Hua Yu | 2014-06-10 |
| 8704383 | Silicon-based thin substrate and packaging schemes | Clinton Chao, Ann Luh, Tjandra Winata Karta, Jerry Tzou, Kuo-Chin Chang | 2014-04-22 |
| 8580683 | Apparatus and methods for molding die on wafer interposers | Chung Yu Wang, Chih-Wei Wu, Jing-Cheng Lin | 2013-11-12 |
| 8569086 | Semiconductor device and method of dicing semiconductor devices | Jing-Cheng Lin, Chih-Wei Wu, Shin-Puu Jeng, Chen-Hua Yu | 2013-10-29 |
| 8557684 | Three-dimensional integrated circuit (3DIC) formation process | Chih-Wei Wu, Jing-Cheng Lin, Shin-Puu Jeng, Chen-Hua Yu | 2013-10-15 |
| 8518753 | Assembly method for three dimensional integrated circuit | Chih-Wei Wu, Jing-Cheng Lin, Shin-Puu Jeng, Chen-Hua Yu | 2013-08-27 |
| 8501590 | Apparatus and methods for dicing interposer assembly | Chung Yu Wang, Kung-Chen Yeh, Chih-Wei Wu, Jing-Cheng Lin | 2013-08-06 |
| 8367474 | Method of manufacturing integrated circuit having stress tuning layer | Shin-Puu Jeng, Clinton Chao | 2013-02-05 |
| 8174129 | Silicon-based thin substrate and packaging schemes | Clinton Chao, Ann Luh, Tjandra Winata Karta, Jerry Tzou, Kuo-Chin Chang | 2012-05-08 |
| 7880278 | Integrated circuit having stress tuning layer | Shin-Puu Jeng, Clinton Chao | 2011-02-01 |
| 7851331 | Bonding structures and methods of forming bonding structures | Mirng-Ji Lii, Chen-Shien Chen, Hua-Shu Wu, Jerry Tzou | 2010-12-14 |
| 7851916 | Strain silicon wafer with a crystal orientation (100) in flip chip BGA package | Hsin-Hui Lee, Mickey Ken, Chien-Hsiun Lee | 2010-12-14 |
| 7846769 | Stratified underfill method for an IC package | Mirng-Ji Lii, Tjandra Winata Karta, Chien-Hsiun Lee | 2010-12-07 |
| 7804177 | Silicon-based thin substrate and packaging schemes | Clinton Chao, Ann Luh, Tjandra Winata Karta, Jerry Tzou, Kuo-Chin Chang | 2010-09-28 |