Issued Patents All Time
Showing 126–150 of 337 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6972253 | Method for forming dielectric barrier layer in damascene structure | Ai-Sen Liu | 2005-12-06 |
| 6962869 | SiOCH low k surface protection layer formation by CxHy gas plasma treatment | Tien-I Bao, Hsin-Hsien Lu, Lih-Ping Li, Chung-Chi Ko, Aaron Song | 2005-11-08 |
| 6958291 | Interconnect with composite barrier layers and method for fabricating the same | Chen-Hua Yu, Horng-Huei Tseng, Chenming Hu | 2005-10-25 |
| 6946397 | Chemical mechanical polishing process with reduced defects in a copper process | William Weilun Hong, Chia-Che CHUNG, Chi-Wei Chung, Wen-Chih Chiou, Ying-Ho Chen | 2005-09-20 |
| 6930040 | Method of forming a contact on a silicon-on-insulator wafer | Chuan-Ping Hou, Ying-Ho Chen, Tung-Ching Tseng | 2005-08-16 |
| 6924238 | Edge peeling improvement of low-k dielectric materials stack by adjusting EBR resistance | Tzu-Jen Chou, Ying-Ho Chen, Shen-Nan Lee | 2005-08-02 |
| 6924242 | SiOC properties and its uniformity in bulk for damascene applications | Chung-Chi Ko, Tien-I Bao, Lih-Ping Li, Al-Sen Liu | 2005-08-02 |
| 6919276 | Method to reduce dishing and erosion in a CMP process | Shen-Nan Lee, Ying-Ho Chen, Tzu-Jen Chou, Jin-Yiing Song | 2005-07-19 |
| 6908773 | ATR-FTIR metal surface cleanliness monitoring | Lain-Jong Li, Chung-Chi Ko | 2005-06-21 |
| 6895360 | Method to measure oxide thickness by FTIR to improve an in-line CMP endpoint determination | Ai-Sen Liu | 2005-05-17 |
| 6884659 | Thin interface layer to improve copper etch stop | Bi-Trong Chen, Lain-Jong Li, Shu E Ku, Tien-I Bao, Lih-Ping Li | 2005-04-26 |
| 6884149 | Method and system for in-situ monitoring of mixing ratio of high selectivity slurry | Shang-Ting Tsai, Ping Chuang, Henry Lo, Chao-Jung Chang, Ping-Hsu Chen +3 more | 2005-04-26 |
| 6878621 | Method of fabricating barrierless and embedded copper damascene interconnects | Zhen-Cheng Wu, Lain-Jong Li, Yung-Chen Lu | 2005-04-12 |
| 6869858 | Shallow trench isolation planarized by wet etchback and chemical mechanical polishing | Ying-Ho Chen | 2005-03-22 |
| 6867135 | Via bottom copper/barrier interface improvement to resolve via electromigration and stress migration | Tien-I Bao | 2005-03-15 |
| 6849549 | Method for forming dummy structures for improved CMP and reduced capacitance | Wen-Chih Chiou | 2005-02-01 |
| 6815336 | Planarization of copper damascene using reverse current electroplating and chemical mechanical polishing | Shau-Lin Shue | 2004-11-09 |
| 6812043 | Method for forming a carbon doped oxide low-k insulating layer | Tien-I Bao, Chung-Chi Ko, Lih-Ping Li | 2004-11-02 |
| 6812069 | Method for improving semiconductor process wafer CMP uniformity while avoiding fracture | Tung-Ching Tseng, Chih-Hsiang Yao | 2004-11-02 |
| 6806184 | Method to eliminate copper hillocks and to reduce copper stress | Ying-Ho Chen | 2004-10-19 |
| 6770570 | Method of forming a semiconductor device with a substantially uniform density low-k dielectric layer | Lih-Ping Li, Hsin-Hsien Lu | 2004-08-03 |
| 6753269 | Method for low k dielectric deposition | Lih-Ping Li, Yung-Chen Lu | 2004-06-22 |
| 6753260 | Composite etching stop in semiconductor process integration | Lain-Jong Li, Tien-I Bao, Shwang-Ming Jeng, Jun-Lung Huang, Jeng-Cheng Liu | 2004-06-22 |
| 6753259 | Method of improving the bondability between Au wires and Cu bonding pads | Mong-Song Liang, Chen-Hua Yu, Chung-Shi Liu, Jane-Bai Lai | 2004-06-22 |
| 6753607 | Structure for improving interlevel conductor connections | Zhen-Cheng Wu, Yung-Cheng Lu | 2004-06-22 |