Issued Patents All Time
Showing 101–125 of 337 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7297632 | Scratch reduction for chemical mechanical polishing | Chuang-Ping Hou, Ying-Ho Chen, Chu-Yun Fu, Tung-Ching Tseng | 2007-11-20 |
| 7265447 | Interconnect with composite layers and method for fabricating the same | Chen-Hua Yu, Horng-Huei Tseng, Chenming Hu | 2007-09-04 |
| 7253524 | Copper interconnects | Zhen-Cheng Wu, Tzu-Jen Chou, Weng Chang, Yung-Cheng Lu, Mong-Song Liang | 2007-08-07 |
| 7250364 | Semiconductor devices with composite etch stop layers and methods of fabrication thereof | Yung-Cheng Lu, Tien-I Bao, Su-Hong Lin | 2007-07-31 |
| 7224068 | Stable metal structure with tungsten plug | Horng-Huei Tseng | 2007-05-29 |
| 7223692 | Multi-level semiconductor device with capping layer for improved adhesion | Keng-Chu Lin, Tien-I Bao | 2007-05-29 |
| 7196423 | Interconnect structure with dielectric barrier and fabrication method thereof | Zhen-Cheng Wu, Ying-Tsung Chen, Yun-Cheng Lu | 2007-03-27 |
| 7193325 | Reliability improvement of SiOC etch with trimethylsilane gas passivation in Cu damascene interconnects | Zhen-Cheng Wu, Bi-Troug Chen, Weng Chang, Su-Horng Lin | 2007-03-20 |
| 7187084 | Damascene method employing composite etch stop layer | Chung-Shi Liu, Chen-Hua Yu | 2007-03-06 |
| 7172964 | Method of preventing photoresist poisoning of a low-dielectric-constant insulator | Chung-Chi Ko | 2007-02-06 |
| 7153197 | Method for achieving uniform CU CMP polishing | Tsu Shih, Sa-Na Lee, Chi-Weng Chung | 2006-12-26 |
| 7151315 | Method of a non-metal barrier copper damascene integration | Zhen-Cheng Wu, Yung-Chen Lu | 2006-12-19 |
| 7135408 | Metal barrier integrity via use of a novel two step PVD-ALD deposition procedure | Zhen-Cheng Wu | 2006-11-14 |
| 7118952 | Method of making transistor with strained source/drain | Yun-Hsiu Chen | 2006-10-10 |
| 7118987 | Method of achieving improved STI gap fill with reduced stress | Chu-Yun Fu, Chih-Cheng Lu | 2006-10-10 |
| 7109119 | Scum solution for chemically amplified resist patterning in cu/low k dual damascene | Tien-I Bao | 2006-09-19 |
| 7109117 | Method for chemical mechanical polishing of a shallow trench isolation structure | Tung-Ching Tseng, Li-Jia Yang, Chuan-Ping Hou | 2006-09-19 |
| RE39273 | Hard masking method for forming patterned oxygen containing plasma etchable layer | Ming-Hsin Huang | 2006-09-12 |
| 7056826 | Method of forming copper interconnects | Zhen-Cheng Wu, Yung-Cheng Lu, Ying-Tsung Chen | 2006-06-06 |
| 7042049 | Composite etching stop in semiconductor process integration | Lain-Jong Li, Tien-I Bao, Shwang-Ming Jeng, Jun-Lung Huang, Jeng-Cheng Liu | 2006-05-09 |
| 7015136 | Method for preventing formation of photoresist scum | Tien-I Bao, Shwang-Min Jeng | 2006-03-21 |
| 7001833 | Method for forming openings in low-k dielectric layers | Tien-J Bao, Lih-Ping Li | 2006-02-21 |
| 7002177 | Test region layout for shallow trench isolation | Weng Chang, Chih-Cheng Lu, Stacey Fu | 2006-02-21 |
| 6974730 | Method for fabricating a recessed channel field effect transistor (FET) device | Carlos H. Diaz, Yi-Ming Sheu, Hun-Jan Tao, Fu-Liang Yang | 2005-12-13 |
| 6972253 | Method for forming dielectric barrier layer in damascene structure | Ai-Sen Liu | 2005-12-06 |