Issued Patents All Time
Showing 1–25 of 211 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9564488 | Strained isolation regions | Tze-Liang Lee, Kuo-Tai Huang, Chao-Cheng Chen, Hao-Ming Lien, Chih-Tang Peng | 2017-02-07 |
| 9455344 | Integrated circuit metal gate structure having tapered profile | Harry-Hak-Lay Chuang, Kong-Beng Thei, Chiung-Han Yeh, Ming-Yuan Wu | 2016-09-27 |
| 9059310 | SRAM devices utilizing strained-channel transistors and methods of manufacture | Harry-Hak-Lay Chuang, Hung-Chih Tsai, Kong-Beng Thei | 2015-06-16 |
| 8932951 | Dishing-free gap-filling with multiple CMPs | Ming-Yuan Wu, Kong-Beng Thei, Chiung-Han Yeh, Harry-Hak-Lay Chuang | 2015-01-13 |
| 8803202 | Layout methods of integrated circuits having unit MOS devices | Harry-Hak-Lay Chuang, Kong-Beng Thei, Jen-Bin Hsu, Chung Long Cheng | 2014-08-12 |
| 8785272 | Process to make high-K transistor dielectrics | Liang-Gi Yao, Ming-Fang Wang, Shih-Chang Chen | 2014-07-22 |
| 8735235 | Integrated circuit metal gate structure and method of fabrication | Harry-Hak-Lay Chuang, Kong-Beng Thei, Chiung-Han Yeh, Ming-Yuan Wu | 2014-05-27 |
| 8736016 | Strained isolation regions | Tze-Liang Lee, Kuo-Tai Huang, Chao-Cheng Chen, Hao-Ming Lien, Chih-Tang Peng | 2014-05-27 |
| 8728900 | Integrating the formation of I/O and core MOS devices with MOS capacitors and resistors | Harry-Hak-Lay Chuang, Wen-Chih Yang, Chien-Liang Chen, Chii-Horng Li | 2014-05-20 |
| 8716103 | Semiconductor device and method of fabricating same | Chung Long Cheng, Sheng-Chen Chung, Kong-Beng Thei, Harry-Hak-Lay Chuang | 2014-05-06 |
| 8669153 | Integrating a first contact structure in a gate last process | Chiung-Han Yeh, Ming-Yuan Wu, Kong-Beng Thei, Harry-Hak-Lay Chuang | 2014-03-11 |
| 8624295 | SRAM devices utilizing strained-channel transistors and methods of manufacture | Harry-Hak-Lay Chuang, Hung-Chih Tsai, Kong-Beng Thei | 2014-01-07 |
| 8564018 | Relaxed silicon germanium substrate with low defect density | Chun Chich Lin, Yee-Chia Yeo, Chien-Chao Huang, Chao-Hsiung Wang, Tien-Chih Chang +4 more | 2013-10-22 |
| 8558278 | Strained transistor with optimized drive current and method of forming | Harry-Hak-Lay Chuang, Kong-Beng Thei, Wen-Huei Guo | 2013-10-15 |
| 8552522 | Dishing-free gap-filling with multiple CMPs | Ming-Yuan Wu, Kong-Beng Thei, Chiung-Han Yeh, Harry-Hak-Lay Chuang | 2013-10-08 |
| 8536660 | Hybrid process for forming metal gates of MOS devices | Peng-Fu Hsu, Yong-Tian Hou, Ssu-Yi Li, Kuo-Tai Huang | 2013-09-17 |
| 8461654 | Spacer shape engineering for void-free gap-filling process | Ming-Yuan Wu, Yi-Shien Mor, Chih-Tang Peng, Chiung-Han Yeh, Kong-Beng Thei +1 more | 2013-06-11 |
| 8461629 | Semiconductor device and method of fabricating same | Chung Long Cheng, Sheng-Chen Chung, Kong-Beng Thei, Harry-Hak-Lay Chuang | 2013-06-11 |
| 8394692 | Integrating a first contact structure in a gate last process | Chiung-Han Yeh, Ming-Yuan Wu, Kong-Beng Thei, Harry-Hak-Lay Chuang | 2013-03-12 |
| 8368170 | Reducing device performance drift caused by large spacings between active regions | Harry-Hak-Lay Chuang, Kong-Beng Thei | 2013-02-05 |
| 8368136 | Integrating a capacitor in a metal gate last process | Harry-Hak-Lay Chuang, Tzung-Chi Lee, Kong-Beng Thei, Sheng-Chen Chung | 2013-02-05 |
| 8349732 | Implanted metal silicide for semiconductor device | Harry-Hak-Lay Chuang, Hung-Chih Tsai, Keh-Chiang Ku, Kong-Beng Thei | 2013-01-08 |
| 8294216 | Integrating the formation of I/O and core MOS devices with MOS capacitors and resistors | Harry-Hak-Lay Chuang, Wen-Chih Yang, Chien-Liang Chen, Chii-Horng Li | 2012-10-23 |
| 8286114 | 3-dimensional device design layout | Harry-Hak-Lay Chuang, Kong-Beng Thei, Sheng-Chen Chung, Chih-Tsung Yao, Jung-Hui Kao +3 more | 2012-10-09 |
| 8274071 | MOS devices with partial stressor channel | Ming-Hua Yu, Tze-Liang Lee, Jr.-Hung Li | 2012-09-25 |