Issued Patents All Time
Showing 1–25 of 38 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12015030 | Gate stacks for semiconductor devices of different conductivity types | Yih-Ann Lin, Ryan Chia-Jen Chen, Donald Y. Chao, Kuo-Tai Huang | 2024-06-18 |
| 11749679 | Integrated circuit structure | Yi-Juei Lee, Chia Ming Liang, Chi-Hsin Chang, Jin-Aun Ng, Huai-Hsien Chiu | 2023-09-05 |
| 11469227 | Semiconductor device and a method for fabricating the same | Chih-Hao Chang, Wen-Huei Guo | 2022-10-11 |
| 11289481 | Single metal that performs N work function and P work function in a high-K/metal gate | Yih-Ann Lin, Ryan Chia-Jen Chen, Donald Y. Chao, Kuo-Tai Huang | 2022-03-29 |
| 11075199 | Method of forming semiconductor structure | Yi-Juei Lee, Chia Ming Liang, Chi-Hsin Chang, Jin-Aun Ng, Huai-Hsien Chiu | 2021-07-27 |
| 11004747 | Fin critical dimension loading optimization | Chia Ming Liang, Huai-Hsien Chiu, Chi-Hsin Chang, Jin-Aun Ng, Yi-Juei Lee | 2021-05-11 |
| 10748896 | Method for fabricating semiconductor device including contact bars having narrower portions | Chih-Hao Chang, Wen-Huei Guo | 2020-08-18 |
| 10692769 | Fin critical dimension loading optimization | Chia Ming Liang, Huai-Hsien Chiu, Chi-Hsin Chang, Jin-Aun Ng, Yi-Juei Lee | 2020-06-23 |
| 10529862 | Semiconductor device and method of forming semiconductor fin thereof | Chia Ming Liang, Huai-Hsien Chiu | 2020-01-07 |
| 10366989 | Semiconductor device having a contact bar over an S/D structure | Chih-Hao Chang, Wen-Huei Guo | 2019-07-30 |
| 10204905 | Semiconductor structure and manufacturing method thereof | Yi-Juei Lee, Chia Ming Liang, Chi-Hsin Chang, Jin-Aun Ng, Huai-Hsien Chiu | 2019-02-12 |
| 9960160 | Method of forming a single metal that performs N work function and P work function in a high-k/metal gate process | Yih-Ann Lin, Ryan Chia-Jen Chen, Donald Y. Chao, Kuo-Tai Huang | 2018-05-01 |
| 9601388 | Integrated high-K/metal gate in CMOS process flow | Ryan Chia-Jen Chen, Jr-Jung Lin, Chien-Hao Chen, Yi-Hsing Chen, Kuo-Tai Huang +1 more | 2017-03-21 |
| 9466528 | Method of making a structure | Chia-Chu Liu, Kuei-Shun Chen, Yu-Lun Liu, Han-Hsun Chang, Shiao-Chian Yeh | 2016-10-11 |
| 9466696 | FinFETs and methods for forming the same | Hsiao-Chu Chen, Mu-Chi Chiang | 2016-10-11 |
| 9460970 | Control fin heights in FinFET structures | Hsiao-Chu Chen, Mu-Chi Chiang | 2016-10-04 |
| 9257426 | Integrated high-k/metal gate in CMOS process flow | Ryan Chia-Jen Chen, Yi-Hsing Chen, Kuo-Tai Huang, Chien-Hao Chen, Yih-Ann Lin +1 more | 2016-02-09 |
| 8975698 | Control fin heights in FinFET structures | Hsiao-Chu Chen, Mu-Chi Chiang | 2015-03-10 |
| 8872339 | Semiconductors structure with elements having different widths and methods of making the same | Chia-Chu Liu, Kuei-Shun Chen, Yu-Lun Liu, Han-Hsun Chang, Shiao-Chian Yeh | 2014-10-28 |
| 8865560 | FinFET design with LDD extensions | Hsiao-Chu Chen, Mu-Chi Chiang | 2014-10-21 |
| 8841731 | Integrated high-k/metal gate in CMOS process flow | Ryan Chia-Jen Chen, Yih-Ann Lin, Jr-Jung Lin, Chien-Hao Chen, Kuo-Tai Huang +1 more | 2014-09-23 |
| 8659097 | Control fin heights in FinFET structures | Hsiao-Chu Chen, Mu-Chi Chiang | 2014-02-25 |
| 8524588 | Method of forming a single metal that performs N work function and P work function in a high-k/metal gate process | Yih-Ann Lin, Ryan Chia-Jen Chen, Donald Y. Chao, Kuo-Tai Huang | 2013-09-03 |
| 8461654 | Spacer shape engineering for void-free gap-filling process | Ming-Yuan Wu, Chih-Tang Peng, Chiung-Han Yeh, Kong-Beng Thei, Harry-Hak-Lay Chuang +1 more | 2013-06-11 |
| 8383502 | Integrated high-K/metal gate in CMOS process flow | Ryan Chia-Jen Chen, Yih-Ann Lin, Jr-Jung Lin, Chien-Hao Chen, Kuo-Tai Huang +1 more | 2013-02-26 |