Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11749679 | Integrated circuit structure | Yi-Juei Lee, Chia Ming Liang, Chi-Hsin Chang, Jin-Aun Ng, Yi-Shien Mor | 2023-09-05 |
| 11075199 | Method of forming semiconductor structure | Yi-Juei Lee, Chia Ming Liang, Chi-Hsin Chang, Jin-Aun Ng, Yi-Shien Mor | 2021-07-27 |
| 11004747 | Fin critical dimension loading optimization | Chia Ming Liang, Yi-Shien Mor, Chi-Hsin Chang, Jin-Aun Ng, Yi-Juei Lee | 2021-05-11 |
| 10692769 | Fin critical dimension loading optimization | Chia Ming Liang, Yi-Shien Mor, Chi-Hsin Chang, Jin-Aun Ng, Yi-Juei Lee | 2020-06-23 |
| 10529862 | Semiconductor device and method of forming semiconductor fin thereof | Chia Ming Liang, Yi-Shien Mor | 2020-01-07 |
| 10204905 | Semiconductor structure and manufacturing method thereof | Yi-Juei Lee, Chia Ming Liang, Chi-Hsin Chang, Jin-Aun Ng, Yi-Shien Mor | 2019-02-12 |