Issued Patents All Time
Showing 1–25 of 38 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12426356 | Semiconductor device structure with hybrid fins | Kuo-Cheng Chiang, Hung-Li Chiang, Tzu-Chiang Chen, I-Sheng Chen | 2025-09-23 |
| 12211844 | Semiconductor structure | Yu-Chao Lin, Tung Ying Lee | 2025-01-28 |
| 11854905 | Silicon and silicon germanium nanowire formation | Kuo-Cheng Chiang, Carlos H. Diaz, Jean-Pierre Colinge | 2023-12-26 |
| 11749679 | Integrated circuit structure | Yi-Juei Lee, Chia Ming Liang, Chi-Hsin Chang, Yi-Shien Mor, Huai-Hsien Chiu | 2023-09-05 |
| 11670711 | Metal gate electrode of a semiconductor device | Jr-Jung Lin, Chih-Han Lin, Ming-Ching Chang, Chao-Cheng Chen | 2023-06-06 |
| 11545490 | Semiconductor structure and method for forming the same | Yu-Chao Lin, Tung Ying Lee | 2023-01-03 |
| 11404325 | Silicon and silicon germanium nanowire formation | Kuo-Cheng Chiang, Carlos H. Diaz, Jean-Pierre Colinge | 2022-08-02 |
| 11398476 | Structure and formation method of semiconductor device with hybrid fins | Kuo-Cheng Chiang, Hung-Li Chiang, Tzu-Chiang Chen, I-Sheng Chen | 2022-07-26 |
| 11133221 | Method for forming semiconductor device structure with gate electrode layer | Sai-Hooi Yeong | 2021-09-28 |
| 11094545 | Self-aligned insulated film for high-K metal gate device | Bao-Ru Young, Harry-Hak-Lay Chuang, Maxi Chang, Chih-Tang Peng, Chih-Yang Yeh +8 more | 2021-08-17 |
| 11075199 | Method of forming semiconductor structure | Yi-Juei Lee, Chia Ming Liang, Chi-Hsin Chang, Yi-Shien Mor, Huai-Hsien Chiu | 2021-07-27 |
| 11004747 | Fin critical dimension loading optimization | Chia Ming Liang, Yi-Shien Mor, Huai-Hsien Chiu, Chi-Hsin Chang, Yi-Juei Lee | 2021-05-11 |
| 10854742 | Metal gate electrode of a semiconductor device | Jr-Jung Lin, Chih-Han Lin, Ming-Ching Chang, Chao-Cheng Chen | 2020-12-01 |
| 10692769 | Fin critical dimension loading optimization | Chia Ming Liang, Yi-Shien Mor, Huai-Hsien Chiu, Chi-Hsin Chang, Yi-Juei Lee | 2020-06-23 |
| 10388531 | Self-aligned insulated film for high-k metal gate device | Bao-Ru Young, Harry-Hak-Lay Chuang, Maxi Chang, Chih-Tang Peng, Chih-Yang Yeh +8 more | 2019-08-20 |
| 10332991 | Metal gate electrode of a semiconductor device | Jr-Jung Lin, Chih-Han Lin, Ming-Ching Chang, Chao-Cheng Chen | 2019-06-25 |
| 10204905 | Semiconductor structure and manufacturing method thereof | Yi-Juei Lee, Chia Ming Liang, Chi-Hsin Chang, Yi-Shien Mor, Huai-Hsien Chiu | 2019-02-12 |
| 9991375 | Metal gate electrode of a semiconductor device | Jr-Jung Lin, Chih-Han Lin, Ming-Ching Chang, Chao-Cheng Chen | 2018-06-05 |
| 9947528 | Structure and method for nFET with high k metal gate | Ming Zhu, Chi-Wen Liu | 2018-04-17 |
| 9865510 | Device and methods for high-K and metal gate slacks | Po-Nien Chen, Bao-Ru Young, Harry-Hak-Lay Chuang, Ming Zhu | 2018-01-09 |
| 9779947 | Self-aligned insulated film for high-k metal gate device | Jen-Sheng Yang, Pei-Ren Jeng, Jung-Hui Kao, Shih-Hao Lo, Yuan-Tien Tu +8 more | 2017-10-03 |
| 9576855 | Device and methods for high-k and metal gate stacks | Wei-Cheng Wu, Bao-Ru Young, Harry-Hak-Lay Chuang, Po-Nien Chen | 2017-02-21 |
| 9252224 | Self-aligned insulated film for high-k metal gate device | Maxi Chang, Jen-Sheng Yang, Ta-Wei Lin, Shih-Hao Lo, Chih-Yang Yeh +8 more | 2016-02-02 |
| 9219125 | Device and methods for high-k and metal gate stacks | Po-Nien Chen, Ming Zhu, Bao-Ru Young, Harry-Hak-Lay Chuang | 2015-12-22 |
| 9093559 | Method of hybrid high-k/metal-gate stack fabrication | Po-Nien Chen, Sheng-Chen Chung, Bao-Ru Young, Hak-Lay Chuang | 2015-07-28 |