Issued Patents All Time
Showing 1–25 of 264 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12237380 | Semiconductor device and method of forming the same | Chia-Ming Chang, Cheng-Chien Li, Hsin-Chieh Huang | 2025-02-25 |
| 12218203 | Integrated circuit structure and method with solid phase diffusion | Cheng-Yi Peng, Ling-Yen Yeh, Chih-Sheng Chang, Yee-Chia Yeo | 2025-02-04 |
| 12068383 | Wrap around silicide for FinFETs | Kuo-Cheng Chiang, Ying-Keung Leung | 2024-08-20 |
| 12040379 | 3D capacitor and method of manufacturing same | Chao-Hsiung Wang | 2024-07-16 |
| 12034077 | Method of forming source/drain regions with expanded widths | Kuo-Cheng Chiang, Ying-Keung Leung | 2024-07-09 |
| 12027522 | Systems and methods for fabricating FinFETs with different threshold voltages | Chao-Hsiung Wang | 2024-07-02 |
| 11894448 | Structure and method for vertical tunneling field effect transistor with leveled source and drain | Harry-Hak-Lay Chuang, Yi-Ren Chen, Chao-Hsiung Wang, Ming Zhu | 2024-02-06 |
| 11855219 | Passivated and faceted for fin field effect transistor | Yen-Yu Chen, Chi-Yuan Shih | 2023-12-26 |
| 11837646 | 3D capacitor and method of manufacturing same | Chao-Hsiung Wang | 2023-12-05 |
| 11798989 | Strained nanowire CMOS device and method of forming | Cheng-Yi Peng, Hung-Li Chiang, Yu-Lin Yang, Chih Chieh Yeh, Yee-Chia Yeo | 2023-10-24 |
| 11784241 | Devices including gate spacer with gap or void and methods of forming the same | Kuo-Cheng Chiang, Ching-Wei Tsai, Ying-Keung Leung | 2023-10-10 |
| 11749724 | Semiconductor device and method of forming the same | Chia-Ming Chang, Cheng-Chien Li, Hsin-Chieh Huang | 2023-09-05 |
| 11749720 | Integrated circuit structure and method with solid phase diffusion | Cheng-Yi Peng, Ling-Yen Yeh, Chih-Sheng Chang, Yee-Chia Yeo | 2023-09-05 |
| 11749603 | Interconnection structure, fabricating method thereof, and semiconductor device using the same | Yu-Hung Lin, Horng-Huei Tseng | 2023-09-05 |
| 11688787 | Semiconductor device having modified profile metal gate | Yu-Lien Huang, Clement Hsingjen Wann, Ming-Huan Tsai, Zhao-Cheng Chen | 2023-06-27 |
| 11682625 | Interconnection structure, fabricating method thereof, and semiconductor device using the same | Yu-Hung Lin, Horng-Huei Tseng | 2023-06-20 |
| 11664218 | Semiconductor device and method | Sheng-Ting Fan, Pin-Shiang Chen, Chee-Wee Liu | 2023-05-30 |
| 11652141 | Strained nanowire CMOS device and method of forming | Cheng-Yi Peng, Hung-Li Chiang, Yu-Lin Yang, Chih Chieh Yeh, Yee-Chia Yeo | 2023-05-16 |
| 11631768 | Semiconductor device and method of manufacturing thereof | Huang-Siang LAN, CheeWee Liu, Shih-Hsien Huang, I-Hsieh Wong, Hung-Yu Yeh +1 more | 2023-04-18 |
| 11594619 | Devices including gate spacer with gap or void and methods of forming the same | Kuo-Cheng Chiang, Ching-Wei Tsai, Ying-Keung Leung | 2023-02-28 |
| 11532500 | FinFET structure with different fin heights and method for forming the same | Yu-Lien Huang, Chi Kang Liu | 2022-12-20 |
| 11437479 | Wrap around silicide for FinFETs | Kuo-Cheng Chiang, Ying-Keung Leung | 2022-09-06 |
| 11404376 | Interconnection structure, fabricating method thereof, and semiconductor device using the same | Yu-Hung Lin, Horng-Huei Tseng | 2022-08-02 |
| 11362087 | Systems and methods for fabricating FinFETs with different threshold voltages | Chao-Hsiung Wang | 2022-06-14 |
| 11362004 | FinFET devices and methods of forming | Kuo-Cheng Chiang | 2022-06-14 |