Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12300698 | Isolation structure for preventing unintentional merging of epitaxially grown source/drain | Ta-Chun Lin, Kuan-Lin Yeh, Chun-Jun Lin, Kuo-Hua Pan | 2025-05-13 |
| 11990525 | Isolation structure for isolating epitaxially grown source/drain regions and method of fabrication thereof | Ta-Chun Lin, Kuan-Lin Yeh, Chun-Jun Lin, Kuo-Hua Pan, Jhon Jhy Liaw | 2024-05-21 |
| 11749683 | Isolation structure for preventing unintentional merging of epitaxially grown source/drain | Ta-Chun Lin, Kuan-Lin Yeh, Chun-Jun Lin, Kuo-Hua Pan | 2023-09-05 |
| 11349002 | Isolation structure for for isolating epitaxially grown source/drain regions and method of fabrication thereof | Ta-Chun Lin, Kuan-Lin Yeh, Chun-Jun Lin, Kuo-Hua Pan, Jhon Jhy Liaw | 2022-05-31 |
| 11315924 | Isolation structure for preventing unintentional merging of epitaxially grown source/drain | Ta-Chun Lin, Kuan-Lin Yeh, Chun-Jun Lin, Kuo-Hua Pan | 2022-04-26 |
| 10872963 | Substrate resistor and method of making same | Hua Feng Chen, Shu-Hui Wang | 2020-12-22 |
| 10297669 | Substrate resistor and method of making same | Hua Feng Chen, Shu-Hui Wang | 2019-05-21 |
| 9607835 | Semiconductor device with biased feature | Chia-Chu Liu, Min-Chang Liang, Kuei-Shun Chen | 2017-03-28 |
| 9496325 | Substrate resistor and method of making same | Hua Feng Chen, Shu-Hui Wang | 2016-11-15 |
| 9466696 | FinFETs and methods for forming the same | Yi-Shien Mor, Hsiao-Chu Chen | 2016-10-11 |
| 9460970 | Control fin heights in FinFET structures | Yi-Shien Mor, Hsiao-Chu Chen | 2016-10-04 |
| 9059001 | Semiconductor device with biased feature | Chia-Chu Liu, Minchang Liang, Kuei-Shun Chen | 2015-06-16 |
| 8975698 | Control fin heights in FinFET structures | Yi-Shien Mor, Hsiao-Chu Chen | 2015-03-10 |
| 8969922 | Field effect transistors and method of forming the same | Chia-Chu Liu, Kuei-Shun Chen, Yao-Kwang Wu, Bi-Fen Wu, Huan-Just Lin +2 more | 2015-03-03 |
| 8865560 | FinFET design with LDD extensions | Yi-Shien Mor, Hsiao-Chu Chen | 2014-10-21 |
| 8659097 | Control fin heights in FinFET structures | Yi-Shien Mor, Hsiao-Chu Chen | 2014-02-25 |
| 8421166 | Semiconductor device and fabrication thereof | Min-hwa Chi, Wen-Chuan Chiang, Cheng-Ku Chen | 2013-04-16 |
| 7994040 | Semiconductor device and fabrication thereof | Min-hwa Chi, Wen-Chuan Chiang, Chang-Ku Chen | 2011-08-09 |
| 7649226 | Source and drain structures and manufacturing methods | Jhon Jhy Liaw | 2010-01-19 |
| 7564105 | Quasi-plannar and FinFET-like transistors on bulk silicon | Min-hwa Chi, Wen-Chuan Chiang | 2009-07-21 |
| 7371634 | Amorphous carbon contact film for contact hole etch process | Wen-Chuan Chiang, Cheng-Ku Chen, Min-hwa Chi | 2008-05-13 |
| RE40138 | Method for improving hot carrier lifetime via a nitrogen implantation procedure performed before or after a Teos liner deposition | Hsien-Chin Lin, Jiaw-Ren Shih | 2008-03-04 |
| 6500739 | Formation of an indium retrograde profile via antimony ion implantation to improve NMOS short channel effect | Howard Chih-Hao Wang, Su-Yu Lu, Carlos H. Diaz | 2002-12-31 |
| 6368928 | Method of forming an indium retrograde profile via use of a low temperature anneal procedure to reduce NMOS short channel effects | Howard Chih-Hao Wang, Su-Yu Lu, Yu-Sen Chu, Chao-Jie Tsai, Carlos H. Diaz | 2002-04-09 |
| 6235600 | Method for improving hot carrier lifetime via a nitrogen implantation procedure performed before or after a teos liner deposition | Hsien-Chin Lin, Jiaw-Ren Shih | 2001-05-22 |