Issued Patents All Time
Showing 1–25 of 30 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12374542 | Cut metal gate process for reducing transistor spacing | Ming-Chang Wen, Chang-Yun Chang, Hung-Kai Chen | 2025-07-29 |
| 11948842 | Etch stop layer between substrate and isolation structure | Ming-Chang Wen, Chang-Yun Chang, Hung-Kai Chen | 2024-04-02 |
| 11721544 | Cut metal gate process for reducing transistor spacing | Ming-Chang Wen, Chang-Yun Chang, Hung-Kai Chen | 2023-08-08 |
| 11239072 | Cut metal gate process for reducing transistor spacing | Ming-Chang Wen, Chang-Yun Chang, Hung-Kai Chen | 2022-02-01 |
| 10991628 | Etch stop layer between substrate and isolation structure | Ming-Chang Wen, Chang-Yun Chang, Hung-Kai Chen | 2021-04-27 |
| 10978351 | Etch stop layer between substrate and isolation structure | Ming-Chang Wen, Chang-Yun Chang, Hung-Kai Chen | 2021-04-13 |
| 10868003 | Creating devices with multiple threshold voltages by cut-metal-gate process | Ming-Chang Wen, Chang-Yun Chang, Bone-Fong Wu, Ya-Hsiu Lin | 2020-12-15 |
| 10651030 | Cut metal gate process for reducing transistor spacing | Ming-Chang Wen, Chang-Yun Chang, Hung-Kai Chen | 2020-05-12 |
| 10515856 | Method of making a FinFET, and FinFET formed by the method | Chia-Pin Lin, Chien-Tai Chan, Shyue-Shyh Lin | 2019-12-24 |
| 10461078 | Creating devices with multiple threshold voltage by cut-metal-gate process | Ming-Chang Wen, Chang-Yun Chang, Bone-Fong Wu, Ya-Hsiu Lin | 2019-10-29 |
| 10319581 | Cut metal gate process for reducing transistor spacing | Ming-Chang Wen, Chang-Yun Chang, Hung-Kai Chen | 2019-06-11 |
| 10224245 | Method of making a finFET, and finFET formed by the method | Chia-Pin Lin, Chien-Tai Chan, Shyue-Shyh Lin | 2019-03-05 |
| 9659776 | Doping for FinFET | Hung-Kai Chen, Tsung-Hung Lee, Han-Pin Chung, Shih-Syuan Huang, Chun-Fu Cheng +3 more | 2017-05-23 |
| 9373704 | Multiple-gate semiconductor device and method | Tung Ying Lee, Li-Wen Weng, Chien-Tai Chan, Da-Wen Lin | 2016-06-21 |
| 9362404 | Doping for FinFET | Hung-Kai Chen, Tsung-Hung Lee, Han-Pin Chung, Shih-Syuan Huang, Chun-Fu Cheng +3 more | 2016-06-07 |
| 9349657 | Fabrication methods of integrated semiconductor structure | Sheng-Hsiung Wang, Yuan-Ching Peng, Chia-Pin Lin, Fan-Yi Hsu, Ya-Jou Hsieh | 2016-05-24 |
| 9312179 | Method of making a finFET, and finFET formed by the method | Chia-Pin Lin, Chien-Tai Chan, Shyue-Shyh Lin | 2016-04-12 |
| 9070624 | Semiconductor device including polysilicon resistor and metal gate resistor and methods of fabricating thereof | Jian-Hao Chen, Chia-Yu Lu, Tung-Heng Hsieh, Kuo-Feng Yu, Chin-Shan Hou +1 more | 2015-06-30 |
| 8994116 | Hybrid gate process for fabricating FinFET device | Tian Choy Gan, Chia-Pin Lin, Shyue-Shyh Lin, Li-Shiun Chen, Shin Hsien Liao | 2015-03-31 |
| 8895383 | Multiple-gate semiconductor device and method | Tung Ying Lee, Li-Wen Weng, Chien-Tai Chan, Da-Wen Lin | 2014-11-25 |
| 8796095 | Integrated method for forming metal gate FinFET devices | Chia-Pin Lin, Wen-Sheh Huang, Tian Choy Gan, Chia-Lung HUNG, Shyue-Shyh Lin | 2014-08-05 |
| 8609495 | Hybrid gate process for fabricating finfet device | Tian Choy Gan, Chia-Pin Lin, Shyue-Shyh Lin, Li-Shiun Chen, Shin Hsien Liao | 2013-12-17 |
| 8426923 | Multiple-gate semiconductor device and method | Tung Ying Lee, Li-Wen Weng, Chien-Tai Chan, Da-Wen Lin | 2013-04-23 |
| 8034677 | Integrated method for forming high-k metal gate FinFET devices | Chia-Pin Lin, Wen-Sheh Huang, Tian Choy Gan, Chia-Lung HUNG, Shyue-Shyh Lin | 2011-10-11 |
| RE40138 | Method for improving hot carrier lifetime via a nitrogen implantation procedure performed before or after a Teos liner deposition | Mu-Chi Chiang, Jiaw-Ren Shih | 2008-03-04 |