Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9307602 | Illumination system | Yung Ta Chen, Sheng-Yu Chiu, Fan-Chieh Chang | 2016-04-05 |
| 8728900 | Integrating the formation of I/O and core MOS devices with MOS capacitors and resistors | Harry-Hak-Lay Chuang, Mong-Song Liang, Chien-Liang Chen, Chii-Horng Li | 2014-05-20 |
| 8450161 | Method of fabricating a sealing structure for high-k metal gate | Chien-Hao Chen, Hao-Ming Lien, Ssu-Yu Li, Jun-Lin Yeh, Kang-Cheng Lin +8 more | 2013-05-28 |
| 8294216 | Integrating the formation of I/O and core MOS devices with MOS capacitors and resistors | Harry-Hak-Lay Chuang, Mong-Song Liang, Chien-Liang Chen, Chii-Horng Li | 2012-10-23 |
| 8193586 | Sealing structure for high-K metal gate | Chien-Hao Chen, Hao-Ming Lien, Ssu-Yi Li, Jun-Lin Yeh, Kang-Cheng Lin +8 more | 2012-06-05 |
| 8003467 | Method for making a semiconductor device having metal gate stacks | Jin-Aun Ng, Chien-Liang Chen, Chung-Hau Fei, Maxi Chang, Bao-Ru Young +1 more | 2011-08-23 |
| 7915111 | Semiconductor device with high-K/dual metal gate | Chien-Liang Chen, Chii-Horng Lee, Harry-Hak-Lay Chuang | 2011-03-29 |
| 7655984 | Semiconductor device with discontinuous CESL structure | Chien-Liang Chen, Chii-Horng Li, Harry-Hak-Lay Chuang | 2010-02-02 |
| 7061117 | Bump layout on silicon chip | Feng-Cheng Su, Chin-Chen Yang | 2006-06-13 |