Issued Patents All Time
Showing 25 most recent of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11621333 | Gate contact structure for a transistor device | Ruilong Xie, Hao Tang, Cheng Chi, Daniel Chanemougame, Lars Liebmann | 2023-04-04 |
| 11031484 | Silicided gate structures | George R. Mulfinger, Judson R. Holt | 2021-06-08 |
| 10854515 | Methods, apparatus, and system for protecting cobalt formations from oxidation during semiconductor device formation | Vimal Kamineni, Ruilong Xie | 2020-12-01 |
| 10727308 | Gate contact structure for a transistor | Ruilong Xie, Hao Tang, Cheng Chi, Daniel Chanemougame, Lars Liebmann | 2020-07-28 |
| 10643893 | Surface area and Schottky barrier height engineering for contact trench epitaxy | Jody A. Fronheiser, Shogo Mochizuki, Hiroaki Niimi, Balasubramanian Pranatharthiharan, Tenko Yamashita | 2020-05-05 |
| 10643894 | Surface area and Schottky barrier height engineering for contact trench epitaxy | Jody A. Fronheiser, Shogo Mochizuki, Hiroaki Niimi, Balasubramanian Pranatharthiharan, Tenko Yamashita | 2020-05-05 |
| 10593593 | Methods, apparatus, and system for protecting cobalt formations from oxidation during semiconductor device formation | Vimal Kamineni, Ruilong Xie | 2020-03-17 |
| 10580696 | Interconnects formed by a metal displacement reaction | Sean Xuan Lin, Christian Witt, Nicholas V. LiCausi, Errol Todd Ryan | 2020-03-03 |
| 10490641 | Methods of forming a gate contact structure for a transistor | Ruilong Xie, Hao Tang, Cheng Chi, Daniel Chanemougame, Lars Liebmann | 2019-11-26 |
| 10483363 | Methods of forming a gate contact structure above an active region of a transistor | Ruilong Xie, Hao Tang, Cheng Chi, Daniel Chanemougame, Lars Liebmann | 2019-11-19 |
| 10283372 | Interconnects formed by a metal replacement process | Sean Xuan Lin, Xunyuan Zhang, Errol Todd Ryan, Nicholas V. LiCausi | 2019-05-07 |
| 10283608 | Low resistance contacts to source or drain region of transistor | Xunyuan Zhang, Frank W. Mont, Chengyu Niu | 2019-05-07 |
| 10204994 | Methods of forming a semiconductor device with a gate contact positioned above the active region | Ruilong Xie, Chanro Park, Andre P. Labonte, Lars Liebmann, Nigel G. Cave +2 more | 2019-02-12 |
| 10186599 | Forming self-aligned contact with spacer first | Su Chen Fan, Andrew M. Greene, Sean Lian, Balasubramanian Pranatharthiharan, Ruilong Xie | 2019-01-22 |
| 10157794 | Integrated circuit structure with stepped epitaxial region | Puneet Harischandra Suvarna, Steven Bentley, Peter M. Zeitzoff | 2018-12-18 |
| 10026693 | Method, apparatus, and system for MOL interconnects without titanium liner | Vimal Kamineni, Praneet Adusumilli, Chengyu Niu | 2018-07-17 |
| 9947589 | Methods of forming a gate contact for a transistor above an active region and the resulting device | Chanro Park, Ruilong Xie, Lars Liebmann, Andre P. Labonte, Nigel G. Cave | 2018-04-17 |
| 9859217 | Middle of the line (MOL) metal contacts | Chengyu Niu, Vimal Kamineni, Xunyuan Zhang | 2018-01-02 |
| 9721889 | Middle of the line (MOL) metal contacts | Chengyu Niu, Vimal Kamineni, Xunyuan Zhang | 2017-08-01 |
| 9679807 | Method, apparatus, and system for MOL interconnects without titanium liner | Vimal Kamineni, Praneet Adusumilli, Chengyu Niu | 2017-06-13 |
| 9218975 | Methods of forming a replacement gate structure having a gate electrode comprised of a deposited intermetallic compound material | Kisik Choi | 2015-12-22 |
| 9184263 | Methods of forming gate structures for semiconductor devices using a replacement gate technique and the resulting devices | Xiuyu Cai, Ajey Poovannummoottil Jacob, Daniel T. Pham, Christopher M. Prindle, Catherine B. Labelle +2 more | 2015-11-10 |
| 9147765 | FinFET semiconductor devices with improved source/drain resistance and methods of making same | Ruilong Xie, Robert J. Miller | 2015-09-29 |
| 9142633 | Integrated circuits and methods for fabricating integrated circuits with silicide contacts on non-planar structures | Paul R. Besser, Valli Arunachalam, Hoon Kim | 2015-09-22 |
| 8854067 | Circular transmission line methods compatible with combinatorial processing of semiconductors | Amol Joshi, Charlene Chen, John Foster, Zhendong Hong, Olov Karlsson +5 more | 2014-10-07 |