Issued Patents All Time
Showing 25 most recent of 55 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12411296 | Reworkable zero-force insertion electrical optical package socket and method | Eric J. M. Moret, Karumbu Meyyappan, Paul Diglio | 2025-09-09 |
| 12413001 | Heterogenous socket contact for electrical and mechanical performance scaling in a microelectronic package | Zhichao Zhang, Zhe Chen, Steven A. Klein, Feifei Cheng, Srikant Nekkanty +2 more | 2025-09-09 |
| 12355002 | Hyperchip | Mark Bohr, Wilfred Gomes, Rajesh Kumar, Doug B. Ingerly | 2025-07-08 |
| 12345932 | Die last and waveguide last architecture for silicon photonic packaging | Bai Nie, Leonel Arana, Yonggang Li, Changhua Liu, Kristof Darmawikarta +4 more | 2025-07-01 |
| 12349303 | Low force liquid metal interconnect solutions | Karumbu Meyyappan, Kyle Arrington, David Craig | 2025-07-01 |
| 12341080 | Semiconductor device stack-up with bulk substrate material to mitigate hot spots | Shrenik Kothari, Chandra Mohan Jha, Weihua Tang, Robert L. Sankman, Xavier Francois Brun | 2025-06-24 |
| 12313890 | Through-substrate optical vias | Zhichao Zhang, Brandon C. Marin, Tarek A. Ibrahim, Kemal Aygun, Stephen Andrew Smith | 2025-05-27 |
| 12298572 | Device, method and system for optical communication with a photonic integrated circuit chip and a transverse oriented lens structure | Changhua Liu, Zhichao Zhang, Liang Zhang, Srikant Nekkanty | 2025-05-13 |
| 12272484 | Coreless electronic substrates having embedded inductors | Srinivas V. Pietambaram, Kristof Darmawikarta, Tarek A. Ibrahim, Prithwish Chatterjee | 2025-04-08 |
| 12230610 | Double-sided substrate with cavities for direct die-to-die interconnect | — | 2025-02-18 |
| 12213288 | Self cooling adaptive flow branching heat exchanger system for cooling of one or more semiconductor chips | Prabhakar Subrahmanyam, Arun Krishnamoorthy, Victor Polyanko, Ying-Feng PANG, Yi Xia +2 more | 2025-01-28 |
| 12164147 | Device, method and system for optical communication with a waveguide structure and an integrated optical coupler of a photonic integrated circuit chip | Changhua Liu, Zhichao Zhang, Liang Zhang | 2024-12-10 |
| 12087658 | Hybrid thermal interface material (TIM) with reduced 3D thermal resistance | Joe Walczyk | 2024-09-10 |
| 12074138 | Hyperchip | Mark Bohr, Wilfred Gomes, Rajesh Kumar, Doug B. Ingerly | 2024-08-27 |
| 12057370 | Vacuum modulated two phase cooling loop efficiency and parallelism enhancement | Paul Diglio, David Shia | 2024-08-06 |
| 12032002 | Chevron interconnect for very fine pitch probing | — | 2024-07-09 |
| 12021016 | Thermally enhanced silicon back end layers for improved thermal performance | Chandra Mohan Jha, Aastha Uppal, Weihua Tang, Paul Diglio, Xavier Francois Brun | 2024-06-25 |
| 11984430 | Hyperchip | Mark Bohr, Wilfred Gomes, Rajesh Kumar, Doug B. Ingerly | 2024-05-14 |
| 11978689 | Semiconductor device stack-up with bulk substrate material to mitigate hot spots | Shrenik Kothari, Chandra Mohan Jha, Weihua Tang, Robert L. Sankman, Xavier Francois Brun | 2024-05-07 |
| 11976671 | Vacuum modulated two phase cooling loop performance enhancement | Paul Diglio, David Shia | 2024-05-07 |
| 11822249 | Method and apparatus to develop lithographically defined high aspect ratio interconnects | — | 2023-11-21 |
| 11824041 | Hyperchip | Mark Bohr, Wilfred Gomes, Rajesh Kumar, Doug B. Ingerly | 2023-11-21 |
| 11817423 | Double-sided substrate with cavities for direct die-to-die interconnect | — | 2023-11-14 |
| 11774489 | Multi-member test probe structure | Justin Huttula | 2023-10-03 |
| 11756860 | Semiconductor device stack-up with bulk substrate material to mitigate hot spots | Shrenik Kothari, Chandra Mohan Jha, Weihua Tang, Robert L. Sankman, Xavier Francois Brun | 2023-09-12 |