TH

Terence B. Hook

IBM: 192 patents #172 of 70,183Top 1%
Globalfoundries: 8 patents #444 of 4,424Top 15%
GU Globalfoundries U.S.: 5 patents #206 of 665Top 35%
ET Elpis Technologies: 1 patents #31 of 121Top 30%
TE Tessera: 1 patents #207 of 271Top 80%
📍 Jericho Center, VT: #1 of 5 inventorsTop 20%
🗺 Vermont: #17 of 4,968 inventorsTop 1%
Overall (All Time): #3,106 of 4,157,543Top 1%
207
Patents All Time

Issued Patents All Time

Showing 176–200 of 207 patents

Patent #TitleCo-InventorsDate
7302376 Device modeling for proximity effects Eric Adler, Serge Biesemans, Micah Galland, Judith H. McCullen, Eric Phipps +1 more 2007-11-27
7300807 Structure and method for providing precision passive elements Douglas D. Coolbaugh, Hayden C. Cranford, Jr., Anthony K. Stamper 2007-11-27
7173338 Suppression of localized metal precipitate formation and corresponding metallization depletion in semiconductor processing Jonathan D. Chapple-Sokol, Baozhen Li, Thomas L. McDevitt, Christopher A. Ponsolle, Bette B. Reuter +2 more 2007-02-06
7166904 Structure and method for local resistor element in integrated circuit technology Jason P. Gill, Randy W. Mann, William J. Murphy, William R. Tonti, Steven H. Voldman 2007-01-23
7132323 CMOS well structure and method of forming the same Wilfried E. Haensch, Louis C. Hsu, Rajiv V. Joshi, Werner Rausch 2006-11-07
7132318 Method of assessing potential for charging damage in SOI designs and structures for eliminating potential for damage Henry A. Bonges, III, David L. Harmon, Wing L. Lai 2006-11-07
7098513 Low trigger voltage, low leakage ESD NFET Kiran V. Chatty, Robert J. Gauthier, Jr., Christopher S. Putnam, Mujahid Muhammad 2006-08-29
7087470 Dual gate dielectric thickness devices Brent A. Anderson 2006-08-08
7067886 Method of assessing potential for charging damage in SOI designs and structures for eliminating potential for damage Henry A. Bonges, III, David L. Harmon, Wing L. Lai 2006-06-27
6956417 Leakage compensation circuit Kerry Bernstein, Anthony R. Bonaccio, John A. Fifield, Allen Haar, Shiu Chung Ho +2 more 2005-10-18
6881672 Selective silicide blocking Matthew J. Breitwisch, Jeffrey S. Brown, Randy W. Mann, Christopher S. Putnam, Mohammad I. Younus 2005-04-19
6825490 On chip resistor calibration structure and method Raminderpal Singh, Stephen D. Wyatt 2004-11-30
6797592 Method for forming a retrograde implant Jeffrey S. Brown, Bryant C. Colwill, Dennis Hoyniak 2004-09-28
6700163 Selective silicide blocking Matthew J. Breitwisch, Jeffrey S. Brown, Randy W. Mann, Christopher S. Putnam, Mohammad I. Younus 2004-03-02
6670683 Composite transistor having a slew-rate control Kerry Bernstein, Anthony Correale, Jr., Douglas W. Stout 2003-12-30
6610585 Method for forming a retrograde implant Jeffrey S. Brown, Bryant C. Colwill, Dennis Hoyniak 2003-08-26
6489223 Angled implant process Randy W. Mann 2002-12-03
6339018 Silicide block bounded device Arne Ballantine 2002-01-15
6333204 Dual EPI active pixel cell design and method of making the same Hon-Sum Philip Wong 2001-12-25
6307805 High performance semiconductor memory device with low power consumption John E. Andersen, Louis L. Hsu, Wei Hwang, Stephen V. Kosonocky, Li-Kong Wang 2001-10-23
6278102 Method of detecting electromagnetic radiation with bandgap engineered active pixel cell design Jeffrey B. Johnson, Robert K. Leidy, Hon-Sum Philip Wong 2001-08-21
6271565 Asymmetrical field effect transistor Dennis Hoyniak, Edward J. Nowak 2001-08-07
6256755 Apparatus and method for detecting defective NVRAM cells Chung H. Lam, Eric Lee, James S. Nakos, Nivo Rovedo, Richard Q. Williams +1 more 2001-07-03
6239649 Switched body SOI (silicon on insulator) circuits and fabrication method therefor Claude L. Bertin, John J. Ellis-Monaghan, Erik L. Hedberg, Jack A. Mandelman, Edward J. Nowak +3 more 2001-05-29
6194702 Method of forming a complementary active pixel sensor cell Jeffrey B. Johnson, Hon-Sum Philip Wong 2001-02-27