| 7284028 |
Comparator eliminating need for one's complement logic for signed numbers |
Kun-Lung Wu |
2007-10-16 |
$5,691,000 |
| 6890766 |
Dual-type thin-film field-effect transistors and applications |
Thomas Doderer, Chang C. Tsuei |
2005-05-10 |
$5,425,000 |
| 6620659 |
Merged logic and memory combining thin film and bulk Si transistors |
Philip George Emmma, Stephen M. Gates |
2003-09-16 |
$13,659,000 |
| 6492227 |
Method for fabricating flash memory device using dual damascene process |
Li-Kong Wang, Louis L. Hsu |
2002-12-10 |
$14,124,000 |
| 6437623 |
Data retention registers |
Louis L. Hsu, Stephen V. Kosonocky, Li-Kong Wang |
2002-08-20 |
$9,830,000 |
| 6307805 |
High performance semiconductor memory device with low power consumption |
John E. Andersen, Terence B. Hook, Louis L. Hsu, Stephen V. Kosonocky, Li-Kong Wang |
2001-10-23 |
$31,841,000 |
| 6285050 |
Decoupling capacitor structure distributed above an integrated circuit and method for making same |
Philip G. Emma, Stephen M. Gates |
2001-09-04 |
$27,475,000 |
| 6279144 |
Provably correct storage arrays |
Walter Henkels, Rajiv V. Joshi, Albert Thomas Williams |
2001-08-21 |
$21,309,000 |
| 6271542 |
Merged logic and memory combining thin film and bulk Si transistors |
Philip G. Emma, Stephen M. Gates |
2001-08-07 |
$22,988,000 |
| 6230290 |
Method of self programmed built in self test |
David F. Heidel, Toshiaki Kirihata |
2001-05-08 |
$26,391,000 |
| 6219822 |
Method and system for tuning of components for integrated circuits |
George D. Gristede, Christophe Robert Tretz |
2001-04-17 |
$20,042,000 |
| 6175949 |
Method and system for selecting sizes of components for integrated circuits |
George D. Gristede, Christophe Robert Tretz |
2001-01-16 |
$36,198,000 |
| 6151266 |
Asynchronous multiport register file with self resetting write operation |
Walter Henkels, Rajiv V. Joshi |
2000-11-21 |
$39,339,000 |
| 6108798 |
Self programmed built in self test |
David F. Heidel, Toshiaki Kirihata |
2000-08-22 |
$30,771,000 |
| 6090153 |
Multi-threshold-voltage differential cascode voltage switch (DCVS) circuits |
Wei Chen, Prabhakar Kudva |
2000-07-18 |
$26,569,000 |
| 5995425 |
Design of provably correct storage arrays |
Walter Henkels, Rajiv V. Joshi, Albert Thomas Williams |
1999-11-30 |
$27,589,000 |
| 5973529 |
Pulse-to-static conversion latch with a self-timed control circuit |
Terry I. Chappell, Walter Henkels, Rajiv V. Joshi |
1999-10-26 |
$20,157,000 |
| 5939898 |
Input isolation for self-resetting CMOS macros |
Walter Henkels, Rajiv V. Joshi |
1999-08-17 |
$20,828,000 |
| 5901304 |
Emulating quasi-synchronous DRAM with asynchronous DRAM |
Rajiv V. Joshi, Yasunao Katayama |
1999-05-04 |
$26,914,000 |
| 5883814 |
System-on-chip layout compilation |
Wing K. Luk, Yasunao Katayama |
1999-03-16 |
$18,667,000 |
| 5875125 |
X+2X adder with multi-bit generate/propagate circuit |
Xiaodong Xiao |
1999-02-23 |
$8,993,000 |
| 5790839 |
System integration of DRAM macros and logic cores in a single chip architecture |
Wing K. Luk |
1998-08-04 |
$10,071,000 |
| 5780335 |
Method of forming a buried-sidewall-strap two transistor one capacitor trench cell |
Walter Henkels |
1998-07-14 |
$15,917,000 |
| 5777491 |
High-performance differential cascode voltage switch with pass gate logic elements |
Fang-Shi Jordan Lai |
1998-07-07 |
$9,897,000 |
| 5617047 |
Reset and pulse width control circuits for high-performance multi-port memories and register files |
Walter Henkels, Rajiv V. Joshi |
1997-04-01 |
$14,570,000 |
