Issued Patents All Time
Showing 26–50 of 57 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5571743 | Method of making buried-sidewall-strap two transistor one capacitor trench cell | Walter Henkels | 1996-11-05 |
| 5541887 | Multiple port cells with improved testability | Sang Hoo Dhong, Toshiaki Kirihata | 1996-07-30 |
| 5481495 | Cells and read-circuits for high-performance register files | Walter Henkels, Terry I. Chappell | 1996-01-02 |
| 5453953 | Bandgap voltage reference generator | Sang Hoo Dhong, Hyun Jong Shin | 1995-09-26 |
| 5362663 | Method of forming double well substrate plate trench DRAM cell array | Gary B. Bronner, Sang Hoo Dhong | 1994-11-08 |
| 5359552 | Power supply tracking regulator for a memory array | Sang Hoo Dhong, Hyun Jong Shin | 1994-10-25 |
| 5336629 | Folder Bitline DRAM having access transistors stacked above trench storage capacitors, each such transistor employing a planar semiconductor body which spans adjacent capacitors | Sang Hoo Dhong, Lewis M. Terman, Matthew R. Wordeman | 1994-08-09 |
| 5300800 | Low leakage substrate plate DRAM cell | Gary B. Bronner, Sang Hoo Dhong | 1994-04-05 |
| 5292678 | Forming a bit line configuration for semiconductor memory | Sang Hoo Dhong | 1994-03-08 |
| 5268871 | Power supply tracking regulator for a memory array | Sang Hoo Dhong, Hyun Jong Shin | 1993-12-07 |
| 5253202 | Word line driver circuit for dynamic random access memories | Gary B. Bronner, Sang Hoo Dhong | 1993-10-12 |
| 5250829 | Double well substrate plate trench DRAM cell array | Gary B. Bronner, Sang Hoo Dhong | 1993-10-05 |
| 5214603 | Folded bitline, ultra-high density dynamic random access memory having access transistors stacked above trench storage capacitors | Sang Hoo Dhong, Lewis M. Terman, Matthew R. Wordeman | 1993-05-25 |
| 5185719 | High speed dynamic, random access memory with extended reset/precharge time | Sang Hoo Dhong | 1993-02-09 |
| 5170243 | Bit line configuration for semiconductor memory | Sang Hoo Dhong | 1992-12-08 |
| 5157634 | DRAM having extended refresh time | Sang Hoo Dhong, Robert L. Franch | 1992-10-20 |
| 5144165 | CMOS off-chip driver circuits | Sang Hoo Dhong, Hyun Jong Shin | 1992-09-01 |
| 5107459 | Stacked bit-line architecture for high density cross-point memory cell array | Christopher Chu, Sang Hoo Dhong, Nicky C. Lu | 1992-04-21 |
| 5075571 | PMOS wordline boost cricuit for DRAM | Sang Hoo Dhong, Yoichi Taira | 1991-12-24 |
| 5064777 | Fabrication method for a double trench memory cell device | San H. Dhong | 1991-11-12 |
| 5034787 | Structure and fabrication method for a double trench memory cell device | Sang Hoo Dhong | 1991-07-23 |
| 5021355 | Method of fabricating cross-point lightly-doped drain-source trench transistor | Sang Hoo Dhong, Nicky C. Lu | 1991-06-04 |
| 4988637 | Method for fabricating a mesa transistor-trench capacitor memory cell structure | Sang Hoo Dhong | 1991-01-29 |
| 4954731 | Wordline voltage boosting circuits for complementary MOSFET dynamic memories | Sang Hoo Dhong, Nicky C. Lu | 1990-09-04 |
| 4954854 | Cross-point lightly-doped drain-source trench transistor and fabrication process therefor | Sang Hoo Dhong, Nicky C. Lu | 1990-09-04 |