Issued Patents All Time
Showing 25 most recent of 29 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9935109 | Dynamic memory structure | Ming-Hong Kuo | 2018-04-03 |
| 9685449 | Dynamic memory structure | Ming-Hong Kuo | 2017-06-20 |
| 9397103 | Dynamic memory structure | Ming-Hong Kuo | 2016-07-19 |
| 9164942 | High speed memory chip module and electronics system device with a high speed memory chip module | Weng-Dah Ken | 2015-10-20 |
| 9105506 | Dynamic memory structure | Ming-Hong Kuo | 2015-08-11 |
| 6163047 | Method of fabricating a self aligned contact for a capacitor over bitline, (COB), memory cell | Janmye Sung | 2000-12-19 |
| 6107134 | High performance DRAM structure employing multiple thickness gate oxide | Kun-Zen Chang | 2000-08-22 |
| 6097641 | High performance DRAM structure employing multiple thickness gate oxide | Kun-Zen Chang | 2000-08-01 |
| 6009023 | High performance DRAM structure employing multiple thickness gate oxide | Kun-Zen Chang | 1999-12-28 |
| 5395784 | Method of manufacturing low leakage and long retention time DRAM | Chih-Yuan Lu, Hsiao-Chin Tuan | 1995-03-07 |
| 5198995 | Trench-capacitor-one-transistor storage cell and array for dynamic random access memories | Robert H. Dennard | 1993-03-30 |
| 5107459 | Stacked bit-line architecture for high density cross-point memory cell array | Christopher Chu, Sang Hoo Dhong, Wei Hwang | 1992-04-21 |
| 5021355 | Method of fabricating cross-point lightly-doped drain-source trench transistor | Sang Hoo Dhong, Wei Hwang | 1991-06-04 |
| 4983544 | Silicide bridge contact process | Brian J. Machesney, Rick L. Mohler, Glen L. Miles, Chung-Yu Ting, Stephen D. Warley | 1991-01-08 |
| 4954731 | Wordline voltage boosting circuits for complementary MOSFET dynamic memories | Sang Hoo Dhong, Wei Hwang | 1990-09-04 |
| 4954854 | Cross-point lightly-doped drain-source trench transistor and fabrication process therefor | Sang Hoo Dhong, Wei Hwang | 1990-09-04 |
| 4927779 | Complementary metal-oxide-semiconductor transistor and one-capacitor dynamic-random-access memory cell and fabrication process therefor | Sang Hoo Dhong, Walter Henkels | 1990-05-22 |
| 4922128 | Boost clock circuit for driving redundant wordlines and sample wordlines | Sang Hoo Dhong, Wei Hwang | 1990-05-01 |
| 4910709 | Complementary metal-oxide-semiconductor transistor and one-capacitor dynamic-random-access memory cell | Sang Hoo Dhong, Walter Henkels | 1990-03-20 |
| 4881105 | Integrated trench-transistor structure and fabrication process | Bijan Davari, Wei Hwang | 1989-11-14 |
| 4833516 | High density memory cell structure having a vertical trench transistor self-aligned with a vertical trench capacitor and fabrication methods therefor | Wei Hwang | 1989-05-23 |
| 4816706 | Sense amplifier with improved bitline precharging for dynamic random access memory | Sang Hoo Dhong | 1989-03-28 |
| 4816884 | High density vertical trench transistor and capacitor memory cell structure and fabrication method therefor | Wei Hwang | 1989-03-28 |
| 4754433 | Dynamic ram having multiplexed twin I/O line pairs | Daeje Chin, Wei Hwang | 1988-06-28 |
| 4728623 | Fabrication method for forming a self-aligned contact window and connection in an epitaxial layer and device structures employing the method | Brian J. Machesney | 1988-03-01 |