SM

Sanjay C. Mehta

IBM: 114 patents #453 of 70,183Top 1%
Globalfoundries: 24 patents #117 of 4,424Top 3%
SS Stmicroelectronics Sa: 2 patents #601 of 1,676Top 40%
AS Adeia Semiconductor Solutions: 1 patents #22 of 57Top 40%
RA Renesas Electronics America: 1 patents #121 of 293Top 45%
TE Tessera: 1 patents #207 of 271Top 80%
📍 San Jose, CA: #168 of 32,062 inventorsTop 1%
🗺 California: #1,525 of 386,348 inventorsTop 1%
Overall (All Time): #9,570 of 4,157,543Top 1%
122
Patents All Time

Issued Patents All Time

Showing 26–50 of 122 patents

Patent #TitleCo-InventorsDate
10304936 Protection of high-K dielectric during reliability anneal on nanosheet structures Nicolas Loubet, Vijay Narayanan, Muthumanickam Sankarapandian 2019-05-28
10269652 Vertical transistor top epitaxy source/drain and contact structure Oleg Gluschenkov, Shogo Mochizuki, Alexander Reznicek 2019-04-23
10262904 Vertical transistor top epitaxy source/drain and contact structure Oleg Gluschenkov, Shogo Mochizuki, Alexander Reznicek 2019-04-16
10256320 Vertical field-effect-transistors having a silicon oxide layer with controlled thickness Chi-Chun Liu, Luciana Meli, Muthumanickam Sankarapandian, Kristin Schmidt, Ankit Vora 2019-04-09
10236360 Method of forming vertical transistor having dual bottom spacers Oleg Gluschenkov, Shogo Mochizuki, Alexander Reznicek 2019-03-19
10229982 Pure boron for silicide contact Chia-Yu Chen, Zuoguang Liu, Tenko Yamashita 2019-03-12
10170479 Fabrication of vertical doped fins for complementary metal oxide semiconductor field effect transistors Kangguo Cheng, Zuoguang Liu, Tenko Yamashita 2019-01-01
10128352 Gate tie-down enablement with inner spacer Su Chen Fan, Andre P. Labonte, Lars Liebmann 2018-11-13
10115629 Air gap spacer formation for nano-scale semiconductor devices Kangguo Cheng, Thomas J. Haigh, Jr., Juntao Li, Eric G. Liniger, Son V. Nguyen +2 more 2018-10-30
10079299 Self aligned top extension formation for vertical transistors Oleg Gluschenkov, Shogo Mochizuki, Alexander Reznicek 2018-09-18
10056382 Modulating transistor performance Dechao Guo, Juntao Li, Robert R. Robison, Huimei Zhou 2018-08-21
10014299 Field effect transistor device spacers Xiuyu Cai, Tenko Yamashita 2018-07-03
9985096 High thermal budget compatible punch through stop integration using doped glass Kangguo Cheng, Xin Miao, Chun-Chen Yeh 2018-05-29
9954103 Bottom spacer formation for vertical transistor Oleg Gluschenkov, Shogo Mochizuki, Alexander Reznicek 2018-04-24
9953976 Effective device formation for advanced technology nodes with aggressive fin-pitch scaling Injo Ok, Balasubramanian Pranatharthiharan, Soon-Cheon Seo, Charan V. Surisetty 2018-04-24
9941391 Method of forming vertical transistor having dual bottom spacers Oleg Gluschenkov, Shogo Mochizuki, Alexander Reznicek 2018-04-10
9941163 Gate tie-down enablement with inner spacer Su Chen Fan, Andre P. Labonte, Lars Liebmann 2018-04-10
9929049 Gate tie-down enablement with inner spacer Su Chen Fan, Andre P. Labonte, Lars Liebmann 2018-03-27
9923074 Pure boron for silicide contact Chia-Yu Chen, Zuoguang Liu, Tenko Yamashita 2018-03-20
9911823 POC process flow for conformal recess fill Andrew M. Greene, Balasubramanian Pranatharthiharan, Ruilong Xie 2018-03-06
9911831 Spacer formation on semiconductor device Thamarai S. Devarajan, Eric R. Miller, Soon-Cheon Seo 2018-03-06
9899259 Gate tie-down enablement with inner spacer Su Chen Fan, Andre P. Labonte, Lars Liebmann 2018-02-20
9892961 Air gap spacer formation for nano-scale semiconductor devices Kangguo Cheng, Thomas J. Haigh, Jr., Juntao Li, Eric G. Liniger, Son V. Nguyen +2 more 2018-02-13
9876091 Divot-free planarization dielectric layer for replacement gate Hemanth Jagannathan 2018-01-23
9871041 Fabrication of vertical doped fins for complementary metal oxide semiconductor field effect transistors Kangguo Cheng, Zuoguang Liu, Tenko Yamashita 2018-01-16