Issued Patents All Time
Showing 376–400 of 633 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8294270 | Copper alloy via bottom liner | Daniel C. Edelstein, Edward C. Cooney, III, John A. Fitzsimmons, Jeffrey P. Gambino | 2012-10-23 |
| 8293634 | Structures and methods for improving solder bump connections in semiconductor devices | Felix P. Anderson, William J. Cote, Daniel C. Edelstein, Thomas L. McDevitt | 2012-10-23 |
| 8293638 | Method of fabricating damascene structures | Jeffrey P. Gambino, Peter J. Lindgren | 2012-10-23 |
| 8288281 | Method for reducing amine based contaminants | Xiaomeng Chen, William J. Cote, Arthur C. Winslow | 2012-10-16 |
| 8279572 | Structure for an on-chip high frequency electro-static discharge device | Hanyi Ding, Kai D. Feng, Zhong-Xiang He, Xuefeng Liu | 2012-10-02 |
| 8242591 | Electrostatic chucking of an insulator handle substrate | Paul S. Andry, Edward C. Cooney, III, Edmund J. Sprogis, Cornelia K. Tsang | 2012-08-14 |
| 8242544 | Semiconductor structure having reduced amine-based contaminants | Xiaomeng Chen, William J. Cote, Arthur C. Winslow | 2012-08-14 |
| 8236663 | Dual-damascene process to fabricate thick wire structure | Douglas D. Coolbaugh, Keith E. Downes, Peter J. Lindgren | 2012-08-07 |
| 8237191 | Heterojunction bipolar transistors and methods of manufacture | James S. Dunn, Alvin J. Joseph | 2012-08-07 |
| 8232139 | Integrated structures of high performance active devices and passive devices | Robert M. Rassel, Daniel S. Vanslette | 2012-07-31 |
| 8232190 | Three dimensional vertical E-fuse structures and methods of manufacturing the same | Kerry Bernstein, Timothy J. Dalton, Jeffrey P. Gambino, Mark D. Jaffe, Stephen E. Luce | 2012-07-31 |
| 8234606 | Metal wiring structure for integration with through substrate vias | David S. Collins, Alvin J. Joseph, Peter J. Lindgren, Kimball M. Watson | 2012-07-31 |
| 8230586 | Method of cooling a resistor | Douglas D. Coolbaugh, Ebenezer E. Eshun, Terence B. Hook, Robert M. Rassel, Edmund J. Sprogis +1 more | 2012-07-31 |
| 8232173 | Structure and design structure for high-Q value inductor and method of manufacturing the same | Hanyi Ding, Mete Erturk, Robert A. Groves, Zhong-Xiang He, Peter J. Lindgren | 2012-07-31 |
| 8211728 | Horizontal micro-electro-mechanical-system switch | Stephen E. Luce | 2012-07-03 |
| 8207568 | Process for single and multiple level metal-insulator-metal integration with a single mask | Anil K. Chinthakindi, Douglas D. Coolbaugh, Keith E. Downes, Ebenezer E. Eshun, Zhong-Xiang He +1 more | 2012-06-26 |
| 8191217 | Complimentary metal-insulator-metal (MIM) capacitors and method of manufacture | James S. Dunn, Zhong-Xiang He | 2012-06-05 |
| 8193893 | Inductor having opening enclosed within conductive line and related method | Mete Erturk, John D. Gillis, Casey J. Grant, David Scagnelli | 2012-06-05 |
| 8188591 | Integrated structures of high performance active devices and passive devices | Robert M. Rassel, Daniel S. Vanslette | 2012-05-29 |
| 8176446 | Method for compensating for variations in structures of an integrated circuit | Santo Credendino, Michael D. Hulvey, Jothimalar Kuppusamy, Robert K. Leidy, Paul William Pastel +1 more | 2012-05-08 |
| 8166651 | Through wafer vias with dishing correction methods | Peter J. Lindgren, Edmund J. Sprogis | 2012-05-01 |
| 8138607 | Metal fill structures for reducing parasitic capacitance | David S. Collins, Howard S. Landis, Janet M. Wilson | 2012-03-20 |
| 8137791 | Fuse and pad stress relief | Felix P. Anderson, Jeffrey P. Gambino, Thomas L. McDevitt | 2012-03-20 |
| 8138008 | Forming an oxide MEMS beam | Joseph P. Hasselbach, Karen L. Lestage | 2012-03-20 |
| 8136084 | Arranging through silicon vias in IC layout | Donald R. Dean, Jr., Peter J. Lindgren, Glen L. Miles, Edmund J. Sprogis | 2012-03-13 |