Issued Patents All Time
Showing 351–375 of 633 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8487355 | Structure and method for compact long-channel FETs | Bruce B. Doris, Carl Radens | 2013-07-16 |
| 8487401 | Methods of fabricating passive element without planarizing and related semiconductor device | Anil K. Chinthakindi, Timothy J. Dalton, Ebenezer E. Eshun, Jeffrey P. Gambino, Kunal Vaed | 2013-07-16 |
| 8482101 | Bipolar transistor structure and method including emitter-base interface impurity | John Benoit, Mattias E. Dahlstrom, Mark D. Dupuis, Peter B. Gray | 2013-07-09 |
| 8471306 | Double-sided integrated circuit chips | Kerry Bernstein, Timothy J. Dalton, Jeffrey P. Gambino, Mark D. Jaffe, Paul D. Kartschoke +1 more | 2013-06-25 |
| 8458888 | Method of manufacturing a micro-electro-mechanical system (MEMS) | John G. Twombly | 2013-06-11 |
| 8458628 | Method for compensating for variations in structures of an integrated circuit | Santo Credendino, Michael D. Hulvey, Jothimalar Kuppusamy, Robert K. Leidy, Paul William Pastel +1 more | 2013-06-04 |
| 8451077 | MEMS switches with reduced switching voltage and methods of manufacture | Stephen E. Luce | 2013-05-28 |
| 8445355 | Metal-insulator-metal capacitors with high capacitance density | Michel J. Abou-Khalil, Robert J. Gauthier, Jr., Tom C. Lee, Junjun Li, Souvick Mitra +1 more | 2013-05-21 |
| 8445306 | Hybrid MEMS RF switch and method of fabricating same | Peter J. Lindgren | 2013-05-21 |
| 8440522 | Increasing an electrical resistance of a resistor by oxidation | Arne Ballantine, Daniel C. Edelstein | 2013-05-14 |
| 8435864 | Process for single and multiple level metal-insulator-metal integration with a single mask | Anil K. Chinthakindi, Douglas D. Coolbaugh, Keith E. Downes, Ebenezer E. Eshun, Zhong-Xiang He +1 more | 2013-05-07 |
| 8421126 | Double-sided integrated circuit chips | Kerry Bernstein, Timothy J. Dalton, Jeffrey P. Gambino, Mark D. Jaffe, Paul D. Kartschoke +1 more | 2013-04-16 |
| 8394718 | Methods of forming self-aligned through silicon via | Jeffrey P. Gambino, Robert K. Leidy | 2013-03-12 |
| 8384224 | Through wafer vias and method of making same | Hanyi Ding, Alvin J. Joseph | 2013-02-26 |
| 8375539 | Method of manufacturing complimentary metal-insulator-metal (MIM) capacitors | James S. Dunn, Zhong-Xiang He | 2013-02-19 |
| 8363379 | Altering capacitance of MIM capacitor having reactive layer therein | Daniel C. Edelstein | 2013-01-29 |
| 8349728 | Method of fabricating copper damascene and dual damascene interconnect wiring | Jeffrey P. Gambino, William R. Hill, Kenneth E. McAvey, Jr., Thomas L. McDevitt, Arthur C. Winslow +1 more | 2013-01-08 |
| 8343868 | Device and methodology for reducing effective dielectric constant in semiconductor devices | Daniel C. Edelstein, Matthew E. Colburn, Edward C. Cooney, III, Timothy J. Dalton, John A. Fitzsimmons +10 more | 2013-01-01 |
| 8299566 | Through wafer vias and method of making same | Hanyi Ding, Alvin J. Joseph | 2012-10-30 |
| 8299615 | Methods and structures for controlling wafer curvature | Mohammed Fazil Fayaz, Jeffery B. Maxson, Daniel S. Vanslette | 2012-10-30 |
| 8299584 | Alignment of wafers for 3D integration | Dmitriy Shneyder, Srinivasan Rangarajan, Michael J. Shapiro, Huilong Zhu | 2012-10-30 |
| 8298860 | Methods for forming a bonded semiconductor substrate including a cooling mechanism | Jeffrey P. Gambino | 2012-10-30 |
| 8298902 | Interconnect structures, methods for fabricating interconnect structures, and design structures for a radiofrequency integrated circuit | Timothy J. Dalton, Ebenezer E. Eshun, Sarah L. Grunow, Zhong-Xiang He | 2012-10-30 |
| 8299455 | Semiconductor structures having improved contact resistance | Bruce B. Doris, Carl Radens, Jay William Strane | 2012-10-30 |
| 8299563 | Methods for forming a bonded semiconductor substrate including a cooling mechanism | Jeffrey P. Gambino | 2012-10-30 |