Issued Patents All Time
Showing 201–225 of 767 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9673222 | Fin isolation structures facilitating different fin isolation schemes | Ajey Poovannummoottil Jacob, Kangguo Cheng, Nicolas Loubet, Prasanna Khare, Rama Divakaruni | 2017-06-06 |
| 9673196 | Field effect transistors with varying threshold voltages | Thomas N. Adam, Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2017-06-06 |
| 9673190 | ESD device compatible with bulk bias capability | Kangguo Cheng, Terence B. Hook, Ali Khakifirooz, Pranita Kerber, Balasubramanian Pranatharthiharan +1 more | 2017-06-06 |
| 9673083 | Methods of forming fin isolation regions on FinFET semiconductor devices by implantation of an oxidation-retarding material | Ajey Poovannummoottil Jacob, Kangguo Cheng, Ali Khakifirooz, Kern Rim | 2017-06-06 |
| 9666693 | Structure and method to minimize junction capacitance in NANO sheets | Terence B. Hook, Xin Miao | 2017-05-30 |
| 9653547 | Integrated etch stop for capped gate and method for manufacturing the same | Josephine B. Chang, Michael A. Guillorn, Isaac Lauer, Xin Miao | 2017-05-16 |
| 9653541 | Structure and method to make strained FinFET with improved junction capacitance and low leakage | Kangguo Cheng, Ali Khakifirooz, Darsen D. Lu, Alexander Reznicek, Kern Rim | 2017-05-16 |
| 9653463 | Semiconductor device with different fin pitches | Terence B. Hook | 2017-05-16 |
| 9653285 | Double aspect ratio trapping | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2017-05-16 |
| 9647139 | Atomic layer deposition sealing integration for nanosheet complementary metal oxide semiconductor with replacement spacer | Michael A. Guillorn, Isaac Lauer, Xin Miao | 2017-05-09 |
| 9640640 | FinFET device with channel strain | Hong He, Sivananda K. Kanakasabapathy, Gauri Karve, Fee Li Lie | 2017-05-02 |
| 9634028 | Metallized junction FinFET structures | Pranita Kerber, Alexander Reznicek, Joshua M. Rubin | 2017-04-25 |
| 9634027 | CMOS structure on SSOI wafer | Hong He, Ali Khakifirooz, Junli Wang | 2017-04-25 |
| 9633911 | Simplified multi-threshold voltage scheme for fully depleted SOI MOSFETs | Kangguo Cheng, Ali Khakifirooz, Qing Liu, Nicolas Loubet, Scott Luning | 2017-04-25 |
| 9627410 | Metallized junction FinFET structures | Pranita Kerber, Alexander Reznicek, Joshua M. Rubin | 2017-04-18 |
| 9627245 | Methods of forming alternative channel materials on a non-planar semiconductor device and the resulting device | Ajey Poovannummoottil Jacob, Kangguo Cheng, Nicolas Loubet | 2017-04-18 |
| 9620507 | Silicon-on-nothing transistor semiconductor structure with channel epitaxial silicon-germanium region | Nicolas Loubet, Qing Liu, Prasanna Khare, Stephane Allegret-Maret, Kangguo Cheng | 2017-04-11 |
| 9620506 | Silicon-on-nothing transistor semiconductor structure with channel epitaxial silicon region | Nicolas Loubet, Qing Liu, Prasanna Khare, Stephane Allegret-Maret, Kangguo Cheng | 2017-04-11 |
| 9614057 | Enriched, high mobility strained fin having bottom dielectric isolation | Hong He, Juntao Li, Junli Wang, Chih-Chao Yang | 2017-04-04 |
| 9608068 | Substrate with strained and relaxed silicon regions | Kangguo Cheng, Pouya Hashemi, Hong He, Alexander Reznicek | 2017-03-28 |
| 9601511 | Low leakage dual STI integrated circuit including FDSOI transistors | Maud Vinet, Kangguo Cheng, Laurent Grenouillet, Ali Khakifirooz, Yannick Le Tiec +1 more | 2017-03-21 |
| 9601390 | Silicon germanium fin formation via condensation | Rajasekhar Venigalla | 2017-03-21 |
| 9601345 | Fin trimming in a double sit process | Kangguo Cheng, Matthew E. Colburn, Ali Khakifirooz | 2017-03-21 |
| 9595578 | Undercut insulating regions for silicon-on-insulator device | Kangguo Cheng, Balasubramanian Pranatharthiharan, Shom Ponoth, Theodorus E. Standaert, Tenko Yamashita | 2017-03-14 |
| 9589956 | Semiconductor device with different fin pitches | Terence B. Hook | 2017-03-07 |