Issued Patents All Time
Showing 176–200 of 767 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9805992 | Strained finFET device fabrication | Hong He, Sivananda K. Kanakasabapathy, Gauri Karve, Fee Li Lie, Stuart A. Sieg | 2017-10-31 |
| 9805991 | Strained finFET device fabrication | Hong He, Sivananda K. Kanakasabapathy, Gauri Karve, Fee Li Lie, Stuart A. Sieg | 2017-10-31 |
| 9793271 | Semiconductor device with different fin pitches | Terence B. Hook | 2017-10-17 |
| 9793374 | Vertical transistor fabrication and devices | Brent A. Anderson, Seong-Dong Kim, Rajasekhar Venigalla | 2017-10-17 |
| 9793114 | Uniform height tall fins with varying silicon germanium concentrations | Stephen W. Bedell, Keith E. Fogel, Alexander Reznicek | 2017-10-17 |
| 9793402 | Retaining strain in finFET devices | Gauri Karve, Fee Li Lie, Junli Wang | 2017-10-17 |
| 9793113 | Semiconductor structure having insulator pillars and semiconductor material on substrate | Alexander Reznicek, Dominic J. Schepis, Kangguo Cheng, Pouya Hashemi | 2017-10-17 |
| 9786497 | Double aspect ratio trapping | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2017-10-10 |
| 9773907 | Method to controllably etch silicon recess for ultra shallow junctions | Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek | 2017-09-26 |
| 9768055 | Isolation regions for SOI devices | Qing Liu, Nicolas Loubet, Prasanna Khare, Shom Ponoth, Maud Vinet | 2017-09-19 |
| 9768079 | Extra gate device for nanosheet | Terence B. Hook, Junli Wang | 2017-09-19 |
| 9761610 | Strain release in PFET regions | Kangguo Cheng, Ali Khakifirooz, Darsen D. Lu, Alexander Reznicek, Kern Rim | 2017-09-12 |
| 9761699 | Integration of strained silicon germanium PFET device and silicon NFET device for finFET structures | Hong He, Junli Wang, Nicolas Loubet | 2017-09-12 |
| 9761498 | Selective oxidation of buried silicon-germanium to form tensile strained silicon FinFETs | Alexander Reznicek, Joshua M. Rubin, Tenko Yamashita | 2017-09-12 |
| 9748365 | SiGe and Si FinFET structures and methods for making the same | Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek | 2017-08-29 |
| 9741722 | Dummy gate structure for electrical isolation of a fin DRAM | John E. Barth, Jr., Kangguo Cheng, Herbert L. Ho, Ali Khakifirooz, Babar A. Khan +4 more | 2017-08-22 |
| 9741792 | Bulk nanosheet with dielectric isolation | Kangguo Cheng, Junli Wang | 2017-08-22 |
| 9741672 | Preventing unauthorized use of integrated circuits for radiation-hard applications | Kangguo Cheng, Ali Khakifirooz, Kenneth P. Rodbell | 2017-08-22 |
| 9735062 | Defect reduction in channel silicon germanium on patterned silicon | Nicolas Loubet, Alexander Reznicek, Joshua M. Rubin | 2017-08-15 |
| 9735272 | Method to controllably etch silicon recess for ultra shallow junctions | Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek | 2017-08-15 |
| 9728642 | Retaining strain in finFET devices | Gauri Karve, Fee Li Lie, Junli Wang | 2017-08-08 |
| 9728640 | Hybrid substrate engineering in CMOS finFET integration for mobility improvement | Chia-Yu Chen, Hong He, Rajasekhar Venigalla | 2017-08-08 |
| 9728625 | Fin formation in fin field effect transistors | Kangguo Cheng, Hong He, Ali Khakifirooz, Yunpeng Yin | 2017-08-08 |
| 9698224 | Silicon germanium fin formation via condensation | Rajasekhar Venigalla | 2017-07-04 |
| 9685539 | Nanowire isolation scheme to reduce parasitic capacitance | Kangguo Cheng, Junli Wang | 2017-06-20 |