Issued Patents All Time
Showing 301–325 of 351 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7776757 | Method of fabricating high-k metal gate devices | Simon Su-Horng Lin, Yu-Ming Lee, Shao-Yen Ku, Chi-Ming Yang, Chyi Shyuan Chern | 2010-08-17 |
| 7767570 | Dummy vias for damascene process | Kuei-Shun Chen, Vencent Chang, Lawrence Lin, Lai Chien Wen, Jhun Hua Chen | 2010-08-03 |
| 7745889 | Metal oxide semiconductor transistor with Y shape metal gate | Chia-Jung Hsu, Li-Wei Cheng | 2010-06-29 |
| 7723014 | System and method for photolithography in semiconductor manufacturing | Kuei-Shun Chen, Tsai-Cheng Gau, Chun-Kung Chen, Hsiao-Tzu Lu, Fu-Jye Liang | 2010-05-25 |
| 7722997 | Holographic reticle and patterning method | Shih-Ming Chang, Chung-Hsing Chang, Chih-Cheng Chin, Wen-Chuan Wang, Chi-Lun Lu +1 more | 2010-05-25 |
| 7675178 | Stacked structure for forming damascene structure | Chih-Chien Liu | 2010-03-09 |
| 7642101 | Semiconductor device having in-chip critical dimension and focus patterns | George Liu, Vencent Chang, Kuei-Shun Chen, Norman Chen | 2010-01-05 |
| 7582538 | Method of overlay measurement for alignment of patterns in semiconductor manufacturing | Hsiao-Tzu Lu, Hua-Shu Wu, Chia-Hsiang Lin, Kuei-Shun Chen | 2009-09-01 |
| 7566525 | Method for forming an anti-etching shielding layer of resist patterns in semiconductor fabrication | Ching-Yu Chang | 2009-07-28 |
| 7557043 | Method of fabricating the stacked structure and damascene process | Chih-Chien Liu | 2009-07-07 |
| 7531296 | Method of forming high etch resistant resist patterns | Ching-Yu Chang | 2009-05-12 |
| 7517746 | Metal oxide semiconductor transistor with Y shape metal gate and fabricating method thereof | Chia-Jung Hsu, Li-Wei Cheng | 2009-04-14 |
| 7501227 | System and method for photolithography in semiconductor manufacturing | Kuei-Shun Chen, David Lu | 2009-03-10 |
| 7482280 | Method for forming a lithography pattern | Ching-Yu Chang, Burn Jeng Lin | 2009-01-27 |
| 7479466 | Method of heating semiconductor wafer to improve wafer flatness | Hsiao-Tzu Lu, Burn Jeng Lin, Kuei-Shun Chen, Tsai-Sheng Gau | 2009-01-20 |
| 7450296 | Method and system for patterning alignment marks on a transparent substrate | Ruei-Hung Jang, Ya-Wen Lee, Tzu-Yang Wu, Sheng-Liang Pan, Tsai-Sheng Gau | 2008-11-11 |
| 7432041 | Method and systems to print contact hole patterns | — | 2008-10-07 |
| 7420188 | Exposure method and apparatus for immersion lithography | Ching-Yu Chang, Burn Jeng Lin, David Lu | 2008-09-02 |
| 7393616 | Line end spacing measurement | Jiann Yuan Huang, Anderson Chang, Chih-Ming Ke, Heng-Jen Lee, Tsai-Sheng Gau | 2008-07-01 |
| 7387969 | Top patterned hardmask and method for patterning | George Liu, Vencent Chang, Norman Chen, Yao-Ching Ku, Kuei-Shun Chen | 2008-06-17 |
| 7371671 | System and method for photolithography in semiconductor manufacturing | Ching-Yu Chang, Burn Jeng Lin | 2008-05-13 |
| 7339272 | Semiconductor device with scattering bars adjacent conductive lines | Kuei-Shun Chen, Yung-Sung Yen, Chih-Ming Lai | 2008-03-04 |
| 7312021 | Holographic reticle and patterning method | Shih-Ming Chang, Chung-Hsing Chang, Chih-Cheng Chin, Wen-Chuan Wang, Chi-Lun Lu +1 more | 2007-12-25 |
| 7307001 | Wafer repair method using direct-writing | Burn Jeng Lin, Tsai-Sheng Gau | 2007-12-11 |
| 7296245 | Combined e-beam and optical exposure semiconductor lithography | — | 2007-11-13 |