Issued Patents All Time
Showing 351–370 of 370 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8049327 | Through-silicon via with scalloped sidewalls | Chen-Cheng Kuo, Chih-Hua Chen, Ming-Fa Chen | 2011-11-01 |
| 8049323 | Chip holder with wafer level redistribution layer | Chao-Hsiang Yang, Jimmy Liang, Han-Liang Tseng, Mirng-Ji Lii, Tjandra Winata Karta +1 more | 2011-11-01 |
| 8034708 | Structure and process for the formation of TSVs | Chen-Cheng Kuo, Kai-Ming Ching | 2011-10-11 |
| 7969013 | Through silicon via with dummy structure and method for forming the same | Chih-Hua Chen, Chen-Cheng Kuo, Wen-Wei Shen | 2011-06-28 |
| 7956442 | Backside connection to TSVs having redistribution lines | Kuo-Ching Hsu | 2011-06-07 |
| 7928534 | Bond pad connection to redistribution lines having tapered profiles | Kuo-Ching Hsu, Hon-Lin Huang | 2011-04-19 |
| 7919406 | Structure and method for forming pillar bump structure having sidewall protection | Ming Hung Tseng, Young-Chang Lien, Chen-Cheng Kuo | 2011-04-05 |
| 7871860 | Method of semiconductor packaging | Han-Ping Pu, Tsung-Shu Lin | 2011-01-18 |
| 7851331 | Bonding structures and methods of forming bonding structures | Szu-Wei Lu, Mirng-Ji Lii, Hua-Shu Wu, Jerry Tzou | 2010-12-14 |
| 7842548 | Fixture for P-through silicon via assembly | Chien-Hsiun Lee, Mirng-Ji Lii, Tjandra Winata Karta | 2010-11-30 |
| 7816227 | Tapered through-silicon via structure | Chen-Cheng Kuo, Kai-Ming Ching, Chih-Hua Chen | 2010-10-19 |
| 7785927 | Multi-die wafer level packaging | Kai-Ming Ching, Chih-Hua Chen, Chen-Cheng Kuo | 2010-08-31 |
| 7666688 | Method of manufacturing a coil inductor | Kai-Ming Ching | 2010-02-23 |
| 7662665 | Method for fabricating a semiconductor package including stress relieving layer for flip chip packaging | Kuo-Chin Chang, Szu-Wei Lu, Pei-Haw Tsao, Chung Yu Wang, Han-Liang Tseng +1 more | 2010-02-16 |
| 7633165 | Introducing a metal layer between SiN and TiN to improve CBD contact resistance for P-TSV | Kuo-Ching Hsu, Boe Su, Hon-Lin Huang | 2009-12-15 |
| 7564115 | Tapered through-silicon via structure | Chen-Cheng Kuo, Kai-Ming Ching, Chih-Hua Chen | 2009-07-21 |
| 7514797 | Multi-die wafer level packaging | Kai-Ming Ching, Chih-Hua Chen, Chen-Cheng Kuo | 2009-04-07 |
| 7294043 | CMP apparatus and process sequence method | Yai-Yei Huang, Ming-Hsiang Kao, Yih-Shung Lin, Winata Karta Tjandra | 2007-11-13 |
| 7118451 | CMP apparatus and process sequence method | Yai-Yei Huang, Ming-Hsiang Kao, Yih-Shung Lin, Winata Karta Tjandra | 2006-10-10 |
| 7004814 | CMP process control method | Yai-Yei Huang, Yean-Zhaw Chen, Kai-Hsiung Chen, Yih-Shung Lin | 2006-02-28 |