Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
MK

Mauro J. Kobrinsky — 96 Patents

Intel: 95 patents #228 of 30,777Top 1%
Portland, OR: #127 of 9,213 inventorsTop 2%
Oregon: #232 of 28,073 inventorsTop 1%
Overall (All Time): #15,731 of 4,157,543Top 1%
96 Patents All Time
Mauro J. Kobrinsky has been granted 96 US patents while listed as an inventor at Intel. The first was granted in 2004 and the most recent in December 2025. Mauro J. Kobrinsky ranks #15,731 of 4,157,543 US inventors in our database (top 0.38%). Patent records list Mauro J. Kobrinsky in Portland, OR, US.

Patents per Year

Patents granted per year, 2004 to 2025Bar chart with a peak of 21 patents in 2025.peak 212004: 1 patents20042005: 2 patents2006: 2 patents20062007: 1 patents2008: 2 patents20082011: 1 patents2012: 1 patents20122013: 1 patents2014: 1 patents20142015: 3 patents2016: 4 patents20162017: 2 patents2018: 1 patents20182019: 4 patents2020: 7 patents20202021: 11 patents2022: 11 patents20222023: 8 patents2024: 12 patents20242025: 21 patents2025

Issued Patents All Time

Showing 26–50 of 96 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12107170 Transistor channel passivation with 2D crystalline material Carl Naylor, Abhishek A. Sharma, Christopher J. Jezewski, Urusa Alaan, Justin R. Weber 2024-10-01 $20,560,000
12100705 Deep trench via for three-dimensional integrated circuit Yih Wang, Rishabh Mehandru, Tahir Ghani, Mark Bohr, Marni Nabors 2024-09-24 $33,787,000
12058849 Three-dimensional nanoribbon-based dynamic random-access memory Wilfred Gomes, Kinyip Phoa, Tahir Ghani, Uygar E. Avci, Rajesh Kumar 2024-08-06 $17,070,000
11996362 Integrated circuit device with crenellated metal trace layout Patrick Morrow, Mark Bohr, Tahir Ghani, Rishabh Mehandru, Ranjith Kumar 2024-05-28 $30,739,000
11985909 Fabrication of stackable embedded eDRAM using a binary alloy based on antimony Elijah V. Karpov 2024-05-14 $33,809,000
11948874 Vertically spaced intra-level interconnect line metallization for integrated circuit devices Kevin Lin, Sukru YEMENICIOGLU, Patrick Morrow, Richard E. Schenker 2024-04-02 $34,819,000
11901347 Microelectronic package with three-dimensional (3D) monolithic memory die Wilfred Gomes, Doug B. Ingerly, Tahir Ghani 2024-02-13 $18,546,000
11881452 Device layer interconnects Mark Bohr, Marni Nabors 2024-01-23 $52,361,000
11830788 Integrated circuits and methods for forming integrated circuits Carl Naylor, Ashish Agrawal, Urusa Alaan, Christopher J. Jezewski, Kevin Lin +1 more 2023-11-28 $31,872,000
11817442 Hybrid manufacturing for integrated circuit devices and assemblies Wilfred Gomes, Abhishek A. Sharma, Doug B. Ingerly 2023-11-14 $31,444,000
11799037 Gate-all-around integrated circuit structures having asymmetric source and drain contact structures Biswajeet Guha, Tahir Ghani 2023-10-24 $20,059,000
11756886 Hybrid manufacturing of microeletronic assemblies with first and second integrated circuit structures Wilfred Gomes, Abhishek A. Sharma, Doug B. Ingerly 2023-09-12 $19,004,000
11721554 Stress compensation for wafer to wafer bonding Anant H. JAHAGIRDAR, Chytra Pawashe, Aaron D. Lilak, Myra McDonnell, Brennen Mueller 2023-08-08 $22,376,000
11690211 Thin film transistor based memory cells on both sides of a layer of logic devices Wilfred Gomes, Conor P. Puls, Kevin J. Fischer, Bernhard Sell, Abhishek A. Sharma +1 more 2023-06-27 $18,721,000
11621354 Integrated circuit structures having partitioned source or drain contact structures Stephanie A. Bojarski, Babita Dhayal, Biswajeet Guha, Tahir Ghani 2023-04-04 $21,090,000
11616015 Integrated circuit device with back-side interconnection to deep source/drain semiconductor Patrick Morrow, Mark Bohr, Tahir Ghani, Rishabh Mehandru 2023-03-28 $20,940,000
11532558 Metallization barrier structures for bonded integrated circuit interfaces Carl Naylor, Richard Vreeland, Ramanan V. Chebiam, William Brezinski, Brennen Mueller +1 more 2022-12-20 $12,719,000
11444166 Backside source/drain replacement for semiconductor devices with metallization on both sides Glenn A. Glass, Karthik Jambunathan, Anand S. Murthy, Chandra S. Mohapatra, Patrick Morrow 2022-09-13 $14,653,000
11410928 Device layer interconnects Mark Bohr, Marni Nabors 2022-08-09 $13,688,000
11373999 Deep trench via for three-dimensional integrated circuit Yih Wang, Rishabh Mehandru, Tahir Ghani, Mark Bohr, Marni Nabors 2022-06-28 $15,065,000
11367796 Gate-all-around integrated circuit structures having asymmetric source and drain contact structures Biswajeet Guha, Tahir Ghani 2022-06-21 $17,814,000
11335686 Transistors with back-side contacts to create three dimensional memory and logic Wilfred Gomes, Abhishek A. Sharma, Tahir Ghani, Doug B. Ingerly, Rajesh Kumar 2022-05-17 $14,251,000
11329162 Integrated circuit structures having differentiated neighboring partitioned source or drain contact structures Stephanie A. Bojarski, Myra McDonnell, Tahir Ghani 2022-05-10 $19,182,000
11328951 Transistor cells including a deep via lined wit h a dielectric material Patrick Morrow, Rishabh Mehandru 2022-05-10 $19,182,000
11276644 Integrated circuits and methods for forming thin film crystal layers Carl Naylor, Ashish Agrawal, Kevin Lin, Abhishek A. Sharma, Christopher J. Jezewski +1 more 2022-03-15 $18,336,000