Issued Patents All Time
Showing 26–50 of 93 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9082625 | Patterning through imprinting | Lawrence A. Clevenger, Carl Radens, Yiheng Xu, John H. Zhang | 2015-07-14 |
| 9080239 | Method and apparatus for angular high density plasma chemical vapor deposition | Daewon Yang, Kangguo Cheng, Pavel Smetana, Keith Kwong Hon Wong | 2015-07-14 |
| 9016236 | Method and apparatus for angular high density plasma chemical vapor deposition | Daewon Yang, Kangguo Cheng, Pavel Smetana, Keith Kwong Hon Wong | 2015-04-28 |
| 8901005 | Method for simultaneously forming features of different depths in a semiconductor substrate | Habib Hichri, Xi Li | 2014-12-02 |
| 8829612 | Method of forming asymmetric spacers and methods of fabricating semiconductor device using asymmetric spacers | Kangguo Cheng, Xi Li | 2014-09-09 |
| 8785281 | CMOS structure and method for fabrication thereof using multiple crystallographic orientations and gate materials | Tze-Chiang Chen, Meikei Ieong, Rajarao Jammy, Mukesh V. Khare, Chun-Yung Sung +2 more | 2014-07-22 |
| 8771533 | Edge protection seal for bonded substrates | Mukta G. Farooq, Emily R. Kinser, Hakeem B. S. Akinmade-Yusuff | 2014-07-08 |
| 8759172 | Etch stop layer formation in metal gate process | Zhengwen Li, Michael P. Chudzik, Ramachandra Divakaruni, Siddarth A. Krishnan, Unoh Kwon | 2014-06-24 |
| 8679611 | Edge protection seal for bonded substrates | Mukta G. Farooq, Emily R. Kinser, Hakeem B. S. Akinmade-Yusuff | 2014-03-25 |
| 8586431 | Three dimensional integration and methods of through silicon via creation | Mukta G. Farooq, Emily R. Kinser, Hakeem Yusuff | 2013-11-19 |
| 8580628 | Integrated circuit contact structure and method | Andre P. Labonte, Ying Li, Brett H. Engel | 2013-11-12 |
| 8569154 | Three dimensional integration and methods of through silicon via creation | Mukta G. Farooq, Emily R. Kinser, Hakeem Yusuff | 2013-10-29 |
| 8507375 | Alignment tolerant semiconductor contact and method | Andre P. Labonte | 2013-08-13 |
| 8492252 | Three dimensional integration and methods of through silicon via creation | Mukta G. Farooq, Emily R. Kinser, Hakeem Yusuff | 2013-07-23 |
| 8492280 | Method for simultaneously forming features of different depths in a semiconductor substrate | Habib Hichri, Xi Li | 2013-07-23 |
| 8492295 | On-chip cooling for integrated circuits | Kaushik A. Kumar, Andres Fernando Munoz, Michael Sievers | 2013-07-23 |
| 8436427 | Dual metal and dual dielectric integration for metal high-K FETs | Michael P. Chudzik, Wiliam K. Henson, Rashmi Jha, Yue Liang, Ravikumar Ramachandran | 2013-05-07 |
| 8435891 | Converting metal mask to metal-oxide etch stop layer and related semiconductor structure | Brett H. Engel, Ying Li, Viraj Y. Sardesai | 2013-05-07 |
| 8426300 | Self-aligned contact for replacement gate devices | Ravikumar Ramachandran, Ying Li | 2013-04-23 |
| 8415238 | Three dimensional integration and methods of through silicon via creation | Mukta G. Farooq, Emily R. Kinser, Hakeem Yusuff | 2013-04-09 |
| 8399180 | Three dimensional integration with through silicon vias having multiple diameters | Mukta G. Farooq, Ramona Kei, Emily R. Kinser, Anthony D. Lisi, Hakeem Yusuff | 2013-03-19 |
| 8298966 | On-chip cooling systems for integrated circuits | Kaushik A. Kumar, Andres Fernando Munoz, Michael Sievers | 2012-10-30 |
| 8287980 | Edge protection seal for bonded substrates | Mukta G. Farooq, Emily R. Kinser, Hakeem B. S. Akinmade-Yusuff | 2012-10-16 |
| 8198103 | Addition of ballast hydrocarbon gas to doped polysilicon etch masked by resist | Timothy J. Dalton, Wesley C. Natzle, Paul W. Pastel, Hongwen Yan, Ying Zhang | 2012-06-12 |
| 8193099 | Protecting exposed metal gate structures from etching processes in integrated circuit manufacturing | Mukesh V. Khare, Renee T. Mo, Ravikumar Ramachandran, Hongwen Yan | 2012-06-05 |