Issued Patents All Time
Showing 1,201–1,225 of 2,819 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10170548 | Integrated capacitors with nanosheet transistors | James J. Demarest, John G. Gaudiello, Juntao Li | 2019-01-01 |
| 10170540 | Capacitors | Veeraraghavan S. Basker, Christopher J. Penny, Theodorus E. Standaert, Junli Wang | 2019-01-01 |
| 10170537 | Capacitor structure compatible with nanowire CMOS | Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek | 2019-01-01 |
| 10170520 | Negative-capacitance steep-switch field effect transistor with integrated bi-stable resistive system | Julien Frougier, Nicolas Loubet, Ruilong Xie, Daniel Chanemougame, Ali Razavieh | 2019-01-01 |
| 10170499 | FinFET device with abrupt junctions | Hong He, Ali Khakifirooz, Alexander Reznicek, Soon-Cheon Seo | 2019-01-01 |
| 10170498 | Strained CMOS on strain relaxation buffer substrate | Balasubramanian Pranatharthiharan, Juntao Li | 2019-01-01 |
| 10170479 | Fabrication of vertical doped fins for complementary metal oxide semiconductor field effect transistors | Zuoguang Liu, Sanjay C. Mehta, Tenko Yamashita | 2019-01-01 |
| 10170475 | Silicon-on-nothing transistor semiconductor structure with channel epitaxial silicon region | Stephane Allegret-Maret, Bruce B. Doris, Prasanna Khare, Qing Liu, Nicolas Loubet | 2019-01-01 |
| 10170471 | Bulk fin formation with vertical fin sidewall profile | Hong He, Sivananda K. Kanakasabapathy, Chiahsun Tseng, Yunpeng Yin | 2019-01-01 |
| 10170469 | Vertical field-effect-transistors having multiple threshold voltages | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2019-01-01 |
| 10170465 | Co-fabrication of vertical diodes and fin field effect transistors on the same substrate | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2019-01-01 |
| 10170464 | Compound semiconductor devices having buried resistors formed in buffer layer | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2019-01-01 |
| 10170463 | Bipolar transistor compatible with vertical FET fabrication | Brent A. Anderson, Terence B. Hook, Tak H. Ning | 2019-01-01 |
| 10170372 | FINFET CMOS with Si NFET and SiGe PFET | Ramachandra Divakaruni, Jeehwan Kim | 2019-01-01 |
| 10170371 | Fabrication of a vertical fin field effect transistor with reduced dimensional variations | — | 2019-01-01 |
| 10170364 | Stress memorization technique for strain coupling enhancement in bulk finFET device | Juntao Li, Chun-Chen Yeh | 2019-01-01 |
| 10170331 | Stacked nanowires | Zhenxing Bi, Juntao Li, Xin Miao | 2019-01-01 |
| 10170319 | Forming a contact for a tall fin transistor | Ruilong Xie, Tenko Yamashita | 2019-01-01 |
| 10164103 | Forming strained channel with germanium condensation | Shogo Mochizuki, Jie Yang | 2018-12-25 |
| 10164092 | Tapered vertical FET having III-V channel | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2018-12-25 |
| 10164056 | Vertical field effect transistors with uniform threshold voltage | Xin Miao, Heng Wu, Peng Xu | 2018-12-25 |
| 10164007 | Transistor with improved air spacer | Zhenxing Bi, Juntao Li, Peng Xu | 2018-12-25 |
| 10164055 | Vertical FET with selective atomic layer deposition gate | Xin Miao, Wenyu Xu, Chen Zhang | 2018-12-25 |
| 10157745 | High aspect ratio gates | Sivananda K. Kanakasabapathy, Peng Xu | 2018-12-18 |
| 10157797 | FinFET devices | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2018-12-18 |