Issued Patents All Time
Showing 76–100 of 190 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10615279 | FinFET with dielectric isolation after gate module for improved source and drain region epitaxial growth | Eric C. Harley, Yue Ke, Rishikesh Krishnan, Keith H. Tabakman, Henry K. Utomo | 2020-04-07 |
| 10557779 | Semiconductor manufactured nano-structures for microbe or virus trapping or destruction | Yann Astier, David Esteban, Henry K. Utomo | 2020-02-11 |
| 10396078 | Integrated circuit structure including laterally recessed source/drain epitaxial region and method of forming same | Christopher D. Sheraw, Timothy J. McArdle, Matthew W. Stoker, Mira Park, George R. Mulfinger +1 more | 2019-08-27 |
| 10393635 | Semiconductor manufactured nano-structures for microbe or virus trapping or destruction | Yann Astier, David Esteban, Henry K. Utomo | 2019-08-27 |
| 10388654 | Methods of forming a gate-to-source/drain contact structure | George R. Mulfinger, Timothy J. McArdle, Thomas Merbeth, Omur Isil Aydin, Ruilong Xie | 2019-08-20 |
| 10326007 | Post gate silicon germanium channel condensation and method for producing the same | George R. Mulfinger, Ryan Sporer, Timothy J. McArdle | 2019-06-18 |
| 10262903 | Boundary spacer structure and integration | Yi Qi, Hsien-Ching Lo, Jianwei Peng | 2019-04-16 |
| 10246730 | Semiconductor manufactured nano-structures for microbe or virus trapping or destruction | Yann Astier, David Esteban, Henry K. Utomo | 2019-04-02 |
| 10243077 | FinFET with dielectric isolation after gate module for improved source and drain region epitaxial growth | Eric C. Harley, Yue Ke, Rishikesh Krishnan, Keith H. Tabakman, Henry K. Utomo | 2019-03-26 |
| 10236343 | Strain retention semiconductor member for channel SiGe layer of pFET | Dina H. Triyoso, Timothy J. McArdle, Amy L. Child, George R. Mulfinger | 2019-03-19 |
| 10204984 | Methods, apparatus and system for forming increased surface regions within EPI structures for improved trench silicide | Matthew W. Stoker, Timothy J. McArdle, Annie Levesque | 2019-02-12 |
| 10163635 | Asymmetric spacer for preventing epitaxial merge between adjacent devices of a semiconductor and related method | Yi Qi, Hui Zang, Hsien-Ching Lo, Jerome Ciavatti | 2018-12-25 |
| 10049942 | Asymmetric semiconductor device and method of forming same | Anthony I. Chou, Arvind Kumar, Henry K. Utomo | 2018-08-14 |
| 10043893 | Post gate silicon germanium channel condensation and method for producing the same | George R. Mulfinger, Ryan Sporer, Timothy J. McArdle | 2018-08-07 |
| 10020307 | Integrated circuit structure including laterally recessed source/drain epitaxial region and method of forming same | Christopher D. Sheraw, Timothy J. McArdle, Matthew W. Stoker, Mira Park, George R. Mulfinger +1 more | 2018-07-10 |
| 9947532 | Forming zig-zag trench structure to prevent aspect ratio trapping defect escape | Shogo Mochizuki, Alexander Reznicek, Melissa A. Smith | 2018-04-17 |
| 9923082 | Junction butting structure using nonuniform trench shape | Anthony I. Chou, Arvind Kumar, Henry K. Utomo | 2018-03-20 |
| 9917190 | FinFET with dielectric isolation after gate module for improved source and drain region epitaxial growth | Eric C. Harley, Yue Ke, Rishikesh Krishnan, Keith H. Tabakman, Henry K. Utomo | 2018-03-13 |
| 9893154 | Recess liner for silicon germanium fin formation | Timothy J. McArdle, Junli Wang | 2018-02-13 |
| 9812453 | Self-aligned sacrificial epitaxial capping for trench silicide | George R. Mulfinger, Lakshmanan H. Vanamurthy, Scott Beasor, Timothy J. McArdle, Hao Zhang | 2017-11-07 |
| 9722045 | Buffer layer for modulating Vt across devices | Bhupesh Chandra, Viorel Ontalus, Timothy J. McArdle, Paul Chang, Claude Ortolland | 2017-08-01 |
| 9698226 | Recess liner for silicon germanium fin formation | Timothy J. McArdle, Junli Wang | 2017-07-04 |
| 9627480 | Junction butting structure using nonuniform trench shape | Anthony I. Chou, Arvind Kumar, Henry K. Utomo | 2017-04-18 |
| 9601565 | Zig-zag trench structure to prevent aspect ratio trapping defect escape | Shogo Mochizuki, Alexander Reznicek, Melissa A. Smith | 2017-03-21 |
| 9577100 | FinFET and nanowire semiconductor devices with suspended channel regions and gate structures surrounding the suspended channel regions | Kangguo Cheng, Michael P. Chudzik, Eric C. Harley, Yue Ke, Rishikesh Krishnan +2 more | 2017-02-21 |