Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
EH

Eric C. Harley — 29 Patents

IBM: 19 patents #5,793 of 70,183Top 9%
Globalfoundries: 13 patents #279 of 4,424Top 7%
CMChartered Semiconductor Manufacturing: 1 patents #419 of 840Top 50%
Infineon Technologies Ag: 1 patents #4,631 of 446Top 1040%
Lagrangeville, NY: #24 of 200 inventorsTop 15%
New York: #4,236 of 115,490 inventorsTop 4%
Overall (All Time): #127,851 of 4,157,543Top 4%
29 Patents All Time
Eric C. Harley has been granted 29 US patents while listed as an inventor at IBM. The first was granted in 2010 and the most recent in August 2021. Eric C. Harley ranks #127,851 of 4,157,543 US inventors in our database (top 3.1%). Patent records list Eric C. Harley in Lagrangeville, NY, US.

Issued Patents All Time

Showing 1–25 of 29 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11081583 FinFET with dielectric isolation after gate module for improved source and drain region epitaxial growth Judson R. Holt, Yue Ke, Rishikesh Krishnan, Keith H. Tabakman, Henry K. Utomo 2021-08-03 $4,187,000
10615279 FinFET with dielectric isolation after gate module for improved source and drain region epitaxial growth Judson R. Holt, Yue Ke, Rishikesh Krishnan, Keith H. Tabakman, Henry K. Utomo 2020-04-07 $1,846,000
10243077 FinFET with dielectric isolation after gate module for improved source and drain region epitaxial growth Judson R. Holt, Yue Ke, Rishikesh Krishnan, Keith H. Tabakman, Henry K. Utomo 2019-03-26 $2,148,000
9917190 FinFET with dielectric isolation after gate module for improved source and drain region epitaxial growth Judson R. Holt, Yue Ke, Rishikesh Krishnan, Keith H. Tabakman, Henry K. Utomo 2018-03-13 $2,527,000
9752251 Self-limiting selective epitaxy process for preventing merger of semiconductor fins Kevin K. Chan, Yue Ke, Annie Levesque 2017-09-05 $2,785,000
9577099 Diamond shaped source drain epitaxy with underlying buffer layer Veeraraghavan S. Basker, Yue Ke, Alexander Reznicek, Henry K. Utomo 2017-02-21 $8,671,000
9577100 FinFET and nanowire semiconductor devices with suspended channel regions and gate structures surrounding the suspended channel regions Kangguo Cheng, Michael P. Chudzik, Judson R. Holt, Yue Ke, Rishikesh Krishnan +2 more 2017-02-21 $8,671,000
9536985 Epitaxial growth of material on source/drain regions of FinFET structure Michael P. Chudzik, Brian J. Greene, Judson R. Holt, Yue Ke, Rishikesh Krishnan +2 more 2017-01-03 $6,197,000
9466616 Uniform junction formation in FinFETs Judson R. Holt, Yue Ke, Timothy J. McArdle, Shogo Mochizuki, Alexander Reznicek 2016-10-11 $4,519,000
9412843 Method for embedded diamond-shaped stress element Judson R. Holt, Jin Z. Wallner, Thomas A. Wallner 2016-08-09 $4,722,000
9390884 Method of inspecting a semiconductor substrate Oliver D. Patterson, Kevin T. Wu 2016-07-12 $2,207,000
9318608 Uniform junction formation in FinFETs Judson R. Holt, Yue Ke, Timothy J. McArdle, Shogo Mochizuki, Alexander Reznicek 2016-04-19 $757,000
9312364 finFET with dielectric isolation after gate module for improved source and drain region epitaxial growth Judson R. Holt, Yue Ke, Rishikesh Krishnan, Keith H. Tabakman, Henry K. Utomo 2016-04-12 $2,843,000
9287264 Epitaxially grown silicon germanium channel FinFET with silicon underlayer Kangguo Cheng, Judson R. Holt, Gauri Karve, Yue Ke, Derrick Liu +4 more 2016-03-15 $907,000
9246003 FINFET structures with fins recessed beneath the gate Kangguo Cheng, Yue Ke, Ali Khakifirooz, Alexander Reznicek 2016-01-26 $652,000
9236477 Graphene transistor with a sublithographic channel width Jack O. Chu, Christos D. Dimitrakopoulos, Judson R. Holt, Timothy J. McArdle, Matthew W. Stoker 2016-01-12 $510,000
9219114 Partial FIN on oxide for improved electrical isolation of raised active regions Kangguo Cheng, Terence B. Hook, Ali Khakifirooz, Henry K. Utomo, Reinaldo Vega 2015-12-22 $977,000
9123826 Single crystal source-drain merged by polycrystalline material Judson R. Holt, Yue Ke, Rishikesh Krishnan, Timothy J. McArdle, Alexander Reznicek +1 more 2015-09-01 $3,766,000
8987093 Multigate finFETs with epitaxially-grown merged source/drains Judson R. Holt, Alexander Reznicek, Thomas N. Adam 2015-03-24 $3,177,000
8716037 Measurement of CMOS device channel strain by X-ray diffraction Thomas N. Adam, Stephen W. Bedell, Judson R. Holt, Anita Madan, Conal E. Murray +1 more 2014-05-06 $5,370,000
8618617 Field effect transistor device Kevin K. Chan, Abhishek Dube, Judson R. Holt, Viorel Ontalus, Kathryn T. Schonenberg +3 more 2013-12-31
8492234 Field effect transistor device Kevin K. Chan, Abhishek Dube, Judson R. Holt, Viorel Ontalus, Kathryn T. Schonenberg +3 more 2013-07-23
8361859 Stressed transistor with improved metastability Thomas N. Adam, Stephen W. Bedell, Abhishek Dube, Judson R. Holt, Alexander Reznicek +4 more 2013-01-29 $3,874,000
8232186 Methods of integrating reverse eSiGe on NFET and SiGe channel on PFET, and related structure Judson R. Holt, Dominic J. Schepis, Michael D. Steigerwalt, Linda Black, Rick Carter 2012-07-31
8084788 Method of forming source and drain of a field-effect-transistor and structure thereof Judson R. Holt, Abhishek Dube, Shwu-Jen Jeng, Jeremy J. Kempisty, Hasan M. Nayfeh +1 more 2011-12-27 $5,499,000