HA

Hiroyuki Akatsu

IBM: 35 patents #2,774 of 70,183Top 4%
MM Minebea Mitsumi: 9 patents #28 of 442Top 7%
Infineon Technologies Ag: 8 patents #2,452 of 7,486Top 35%
SA Siemens Aktiengesellschaft: 4 patents #3,516 of 22,248Top 20%
KT Kabushiki Kaisha Toshiba: 2 patents #9,982 of 21,451Top 50%
MC Minebea Co.: 2 patents #245 of 736Top 35%
NU National University Corporation Chiba University: 1 patents #100 of 320Top 35%
AE Alpine Electronics: 1 patents #279 of 637Top 45%
SH Showa: 1 patents #167 of 337Top 50%
📍 Tokyo, NY: #31 of 99 inventorsTop 35%
Overall (All Time): #58,468 of 4,157,543Top 2%
48
Patents All Time

Issued Patents All Time

Showing 26–48 of 48 patents

Patent #TitleCo-InventorsDate
6809027 Self-aligned borderless contacts Jay William Strane, David M. Dobuzinsky 2004-10-26
6806138 Integration scheme for enhancing capacitance of trench capacitors Kangguo Cheng, Rama Divakaruni 2004-10-19
6806177 Method of making self-aligned borderless contacts Jay William Strane, David M. Dobuzinsky 2004-10-19
6723611 Vertical hard mask Oleg Gluschenkov, Porshia S. Parkinson, Ravikumar Ramachandran, Helmut Tews, Kenneth T. Settlemyer, Jr. 2004-04-20
6724031 Method for preventing strap-to-strap punch through in vertical DRAMs Dureseti Chidambarrao, Ramachandra Divakaruni, Jack A. Mandelman, Carl Radens 2004-04-20
6485894 Method to self-align a lithographic pattern to a workpiece Franz Zach 2002-11-26
6449202 DRAM direct sensing scheme Louis L. Hsu, Jeremy K. Stephens, Daniel W. Storaska 2002-09-10
6387782 Process of forming an ultra-shallow junction dopant layer having a peak concentration within a dielectric layer Omer H. Dokumaci, Suryanarayan G. Hegde, Yujun Li, Rajesh Rengarajan, Paul A. Ronsheim 2002-05-14
6379577 Hydrogen peroxide and acid etchant for a wet etch process David E. Kotecki, Jingyu Lian, Hua Shen 2002-04-30
6333274 Method of manufacturing a semiconductor device including a seamless shallow trench isolation step Soichi Nadahara, Takashi Nakao, Seiko Yoshida 2001-12-25
6329271 Self-aligned channel implantation Yujun Li, Jochen Beintner 2001-12-11
6329704 Ultra-shallow junction dopant layer having a peak concentration within a dielectric layer Omer H. Dokumaci, Suryanarayan G. Hegde, Yujun Li, Rajesh Rengarajan, Paul A. Ronsheim 2001-12-11
6319794 Structure and method for producing low leakage isolation devices Tze-Chiang Chen, Laertis Economikos, Herbert L. Ho, Richard L. Kleinhenz, Jack A. Mandelman +1 more 2001-11-20
6297530 Self aligned channel implantation Yujun Li, Jochen Beintner 2001-10-02
6281084 Disposable spacers for improved array gapfill in high density DRAMs Ramachandra Divakaruni, Gill Yong Lee 2001-08-28
6060388 Conductors for microelectronic circuits and method of manufacture Russell H. Arndt, Bradley P. Jones, George F. Ouimet 2000-05-09
6039055 Wafer cleaning with dissolved gas concentration control 2000-03-21
6021789 Wafer cleaning system with progressive megasonic wave Soichi Nadahara 2000-02-08
5980770 Removal of post-RIE polymer on Al/Cu metal line Ravikumar Ramachandran, Wesley C. Natzle, Martin Gutsche, Chien-Yi Yu 1999-11-09
5934299 Apparatus and method for improved washing and drying of semiconductor wafers Ravikumar Ramachandran 1999-08-10
5932493 Method to minimize watermarks on silicon substrates Ronald Hoyer, Ravikumar Ramachandran 1999-08-03
5807439 Apparatus and method for improved washing and drying of semiconductor wafers Ravikumar Ramachandran 1998-09-15
5717635 High density EEPROM for solid state file 1998-02-10