Issued Patents All Time
Showing 1–25 of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9355887 | Dual trench isolation for CMOS with hybrid orientations | Victor Chan, Meikei Ieong, Alexander Reznicek, Chun-Yung Sung, Min Yang | 2016-05-31 |
| 8097516 | Dual trench isolation for CMOS with hybrid orientations | Victor Chan, Meikei Ieong, Alexander Reznicek, Chun-Yung Sung, Min Yang | 2012-01-17 |
| 7943486 | Enhancement of electron and hole mobilities in <110> Si under biaxial compressive strain | Victor Chan, Massimo V. Fischetti, John Michael Hergenrother, Meikei Ieong, Alexander Reznicek +3 more | 2011-05-17 |
| 7883948 | Method and structure for reducing induced mechanical stresses | Brian J. Greene | 2011-02-08 |
| 7572689 | Method and structure for reducing induced mechanical stresses | Brian J. Greene | 2009-08-11 |
| 7473607 | Method of manufacturing a multi-workfunction gates for a CMOS circuit | Xiangdong Chen | 2009-01-06 |
| 7462525 | Enhancement of electron and hole mobilities in <110> Si under biaxial compressive strain | Victor Chan, Massimo V. Fischetti, John Michael Hergenrother, Meikei Ieong, Alexander Reznicek +3 more | 2008-12-09 |
| 7314790 | Enhancement of electron and hole mobilities in <110> Si under biaxial compressive strain | Victor Chan, Massimo V. Fischetti, John Michael Hergenrother, Meikei Ieong, Alexander Reznicek +3 more | 2008-01-01 |
| 7161169 | Enhancement of electron and hole mobilities in <110> Si under biaxial compressive strain | Victor Chan, Massimo V. Fischetti, John Michael Hergenrother, Meikei Leong, Alexander Reznicek +3 more | 2007-01-09 |
| 6960523 | Method of reducing erosion of a nitride gate cap layer during reactive ion etch of nitride liner layer for bit line contact of DRAM device | Michael Maldei, Prakash Dev, David M. Dobuzinsky, Johnathan E. Faltermeier, Thomas Rupp +3 more | 2005-11-01 |
| 6960818 | Recessed shallow trench isolation structure nitride liner and method for making same | Venkatachalam C. Jaiprakash | 2005-11-01 |
| 6869866 | Silicide proximity structures for CMOS device performance improvements | Dureseti Chidambarrao, Omer H. Dokumaci, An Steegen | 2005-03-22 |
| 6867087 | Formation of dual work function gate electrode | Kilho Lee, Woo-Tang Kang | 2005-03-15 |
| 6740920 | Vertical MOSFET with horizontally graded channel doping | Dureseti Chidambarrao, Kil-Ho Lee, Jack A. Mandelman, Kevin McStay | 2004-05-25 |
| 6724053 | PMOSFET device with localized nitrogen sidewall implantation | Rama Divakaruni, Ryota Katsumata, Giuseppe La Rosa, Mary E. Weybright | 2004-04-20 |
| 6635526 | Structure and method for dual work function logic devices in vertical DRAM process | Rajeev Malik, Rama Divakaruni | 2003-10-21 |
| 6521493 | Semiconductor device with STI sidewall implant | Johann Alsmeier, Giuseppe Larosa, Joseph M. Lukaitis | 2003-02-18 |
| 6501131 | Transistors having independently adjustable parameters | Rama Divakaruni, Jeffrey P. Gambino, Jack A. Mandelman | 2002-12-31 |
| 6426247 | Low bitline capacitance structure and method of making same | Ramachandra Divakaruni, Jeffrey P. Gambino, Jack A. Mandelman | 2002-07-30 |
| 6387782 | Process of forming an ultra-shallow junction dopant layer having a peak concentration within a dielectric layer | Hiroyuki Akatsu, Omer H. Dokumaci, Suryanarayan G. Hegde, Yujun Li, Paul A. Ronsheim | 2002-05-14 |
| 6329704 | Ultra-shallow junction dopant layer having a peak concentration within a dielectric layer | Hiroyuki Akatsu, Omer H. Dokumaci, Suryanarayan G. Hegde, Yujun Li, Paul A. Ronsheim | 2001-12-11 |
| 6323103 | Method for fabricating transistors | Jochen Beintner, Ulrike Gruening, Hans-Oliver Joachim | 2001-11-27 |
| 6197632 | Method for dual sidewall oxidation in high density, high performance DRAMS | Gary B. Bronner, Rama Divakaruni, Scott D. Halle, Dale W. Martin, Mary E. Weybright | 2001-03-06 |
| 6194278 | Device performance by employing an improved method for forming halo implants | — | 2001-02-27 |
| 6127215 | Deep pivot mask for enhanced buried-channel PFET performance and reliability | Hans-Oliver Joachim, Jack A. Mandelman | 2000-10-03 |