Issued Patents All Time
Showing 101–125 of 225 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10304938 | Maskless method to reduce source-drain contact resistance in CMOS devices | Praneet Adusumilli, Christian Lavoie | 2019-05-28 |
| 10304746 | Complementary metal oxide semiconductor replacement gate high-K metal gate devices with work function adjustments | Lisa F. Edge, Paul C. Jamison, Vamsi K. Paruchuri | 2019-05-28 |
| 10297598 | Formation of full metal gate to suppress interficial layer growth | Ruqiang Bao, Paul C. Jamison, Choonghyun Lee, Vijay Narayanan | 2019-05-21 |
| 10297671 | Uniform threshold voltage for nanosheet devices | Ruqiang Bao, Paul C. Jamison, Choonghyun Lee, Vijay Narayanan, Koji Watanabe | 2019-05-21 |
| 10290700 | Multilayer dielectric for metal-insulator-metal capacitor (MIMCAP) capacitance and leakage improvement | Takashi Ando, Eduard A. Cartier, Paul C. Jamison | 2019-05-14 |
| 10283620 | Approach to control over-etching of bottom spacers in vertical fin field effect transistor devices | Ruqiang Bao, Paul C. Jamison, Choonghyun Lee | 2019-05-07 |
| 10276687 | Formation of self-aligned bottom spacer for vertical transistors | Ruqiang Bao, Choonghyun Lee, Shogo Mochizuki | 2019-04-30 |
| 10256161 | Dual work function CMOS devices | Muthumanickam Sankarapandian, Koji Watanabe | 2019-04-09 |
| 10256159 | Formation of common interfacial layer on Si/SiGe dual channel complementary metal oxide semiconductor device | Ruqiang Bao, Choonghyun Lee, Shogo Mochizuki | 2019-04-09 |
| 10256289 | Efficient metal-insulator-metal capacitor fabrication | Kisup Chung, Isabel C. Estrada-Raygoza, Chi-Chun Liu, Yann Mignot, Hao Tang | 2019-04-09 |
| 10249540 | Dual channel CMOS having common gate stacks | Takashi Ando, Choonghyun Lee, Vijay Narayanan | 2019-04-02 |
| 10249758 | FinFET with sigma recessed source/drain and un-doped buffer layer epitaxy for uniform junction formation | Dechao Guo, Shogo Mochizuki, Gen Tsutsui, Chun-Chen Yeh | 2019-04-02 |
| 10236219 | VFET metal gate patterning for vertical transport field effect transistor | Brent A. Anderson, Ruqiang Bao, Kangguo Cheng, Choonghyun Lee, Junli Wang | 2019-03-19 |
| 10229856 | Dual channel CMOS having common gate stacks | Takashi Ando, Choonghyun Lee, Vijay Narayanan | 2019-03-12 |
| 10229975 | Fabrication of silicon-germanium fin structure having silicon-rich outer surface | Choonghyun Lee, Shogo Mochizuki, Koji Watanabe | 2019-03-12 |
| 10229986 | Vertical transport field-effect transistor including dual layer top spacer | Choonghyun Lee, Alexander Reznicek, Christopher J. Waskiewicz | 2019-03-12 |
| 10170316 | Controlling threshold voltage in nanosheet transistors | Paul C. Jamison | 2019-01-01 |
| 10147680 | Method to reduce variability in contact resistance | Praneet Adusumilli, Christian Lavoie, Jean L. Sweet | 2018-12-04 |
| 10128372 | Bottom contact resistance reduction on VFET | Ruqiang Bao, Choonghyun Lee, Shogo Mochizuki | 2018-11-13 |
| 10096713 | FinFET with sigma recessed source/drain and un-doped buffer layer epitaxy for uniform junction formation | Dechao Guo, Shogo Mochizuki, Gen Tsutsui, Chun-Chen Yeh | 2018-10-09 |
| 10090378 | Efficient metal-insulator-metal capacitor | Kisup Chung, Isabel C. Estrada-Raygoza, Chi-Chun Liu, Yann Mignot, Hao Tang | 2018-10-02 |
| 10084082 | Bottom contact resistance reduction on VFET | Ruqiang Bao, Choonghyun Lee, Shogo Mochizuki | 2018-09-25 |
| 10084055 | Uniform threshold voltage for nanosheet devices | Ruqiang Bao, Paul C. Jamison, Choonghyun Lee, Vijay Narayanan, Koji Watanabe | 2018-09-25 |
| 10079233 | Semiconductor device and method of forming the semiconductor device | Robin Hsin Kuo Chao, Choonghyun Lee, Chun Wing Yeung, Jingyun Zhang | 2018-09-18 |
| 10056484 | VTFET devices utilizing low temperature selective epitaxy | Shogo Mochizuki | 2018-08-21 |