Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
DR

David Scott Ray — 32 Patents

IBM: 28 patents #3,689 of 70,183Top 6%
Qualcomm: 2 patents #5,657 of 12,104Top 50%
ASAltria Client Services: 1 patents #340 of 418Top 85%
PUPhilip Morris Usa: 1 patents #601 of 564Top 110%
Austin, TX: #939 of 18,064 inventorsTop 6%
Texas: #3,566 of 125,132 inventorsTop 3%
Overall (All Time): #110,428 of 4,157,543Top 3%
32 Patents All Time
David Scott Ray has been granted 32 US patents while listed as an inventor at IBM. The first was granted in 1991 and the most recent in December 2024. David Scott Ray ranks #110,428 of 4,157,543 US inventors in our database (top 2.7%). Patent records list David Scott Ray in Austin, TX, US.

Patents per Year

Patents granted per year, 1991 to 2024Bar chart with a peak of 4 patents in 2000.peak 41991: 1 patents19911995: 1 patents1997: 1 patents19972000: 4 patents2002: 3 patents20022003: 2 patents2005: 2 patents20052007: 1 patents2008: 3 patents20082010: 2 patents2011: 3 patents20112012: 1 patents2016: 2 patents20162018: 1 patents2020: 2 patents20202021: 1 patents2023: 1 patents20232024: 1 patents2024

Issued Patents All Time

Showing 1–25 of 32 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12175509 Mobile tobacco receiving station Hal L. Teegarden, John Stewart Livesay, Isidro Gomez 2024-12-24 $50,314,000
11550723 Method, apparatus, and system for memory bandwidth aware data prefetching Niket K. Choudhary, Thomas Philip Speier, Eric F. Robinson, Harold W. Cain, III, Nikhil Narendradev Sharma +3 more 2023-01-10 $15,777,000
11061822 Method, apparatus, and system for reducing pipeline stalls due to address translation misses Pritha Ghoshal, Niket K. Choudhary, Ravi Rajagopalan, Patrick Eibl, Brian Michael Stempel +1 more 2021-07-13 $37,091,000
10664275 Speeding up younger store instruction execution after a sync instruction Susan E. Eisen, Hung Q. Le, Bryan Lloyd, Dung Q. Nguyen, Benjamin W. Stolt +1 more 2020-05-26 $2,933,000
10572920 Mobile tobacco receiving station Hal L. Teegarden, John Stewart Livesay, Isidro Gomez 2020-02-25 $61,700,000
10067765 Speeding up younger store instruction execution after a sync instruction Susan E. Eisen, Hung Q. Le, Bryan Lloyd, Dung Q. Nguyen, Benjamin W. Stolt +1 more 2018-09-04 $2,923,000
9389867 Speculative finish of instruction execution in a processor core Sundeep Chadha, Bryan Lloyd, Dung Q. Nguyen, Benjamin W. Stolt 2016-07-12 $3,552,000
9384002 Speculative finish of instruction execution in a processor core Sundeep Chadha, Bryan Lloyd, Dung Q. Nguyen, Benjamin W. Stolt 2016-07-05 $5,294,000
8156287 Adaptive data prefetch Pradip Bose, Alper Buyuktosunoglu, Miles Robert Dooley, Michael Stephen Floyd, Bruce Joseph Ronchetti 2012-04-10 $19,969,000
8086801 Loading data to vector renamed register from across multiple cache lines David A. Hrusecky, Bruce Joseph Ronchetti, Shih-Hsiung S. Tung 2011-12-27 $5,499,000
8082423 Generating a flush vector from a first execution unit directly to every other execution unit of a plurality of execution units in order to block all register updates Christopher M. Abernathy, Kurt A. Feiste, David Shippy, Albert J. Van Norstrand, Jr. 2011-12-20 $11,265,000
7953960 Method and apparatus for delaying a load miss flush until issuing the dependent instruction Kurt A. Feiste, David Shippy, Albert J. Van Norstrand, Jr. 2011-05-31 $4,283,000
7769985 Load address dependency mechanism system and method in a high frequency, low power processor system Brian D. Barrick, Kimberly M. Fernsler, Dwain A. Hicks, David Shippy, Takeki Osanai 2010-08-03 $4,325,000
7730290 Systems for executing load instructions that achieve sequential load consistency Brian D. Barrick, Kimberly M. Fernsler, Dwain A. Hicks, Takeki Osanai 2010-06-01 $6,263,000
7464242 Method of load/store dependencies detection with dynamically changing address length Brian D. Barrick, Dwain A. Hicks, Takeki Osanai 2008-12-09 $6,024,000
7376816 Method and systems for executing load instructions that achieve sequential load consistency Brian D. Barrick, Kimberly M. Fernsler, Dwain A. Hicks, Takeki Osanai 2008-05-20 $8,483,000
7363468 Load address dependency mechanism system and method in a high frequency, low power processor system Brian D. Barrick, Kimberly Marie Fensler, Dwain A. Hicks, David Shippy, Takeki Osanai 2008-04-22 $8,943,000
7302527 Systems and methods for executing load instructions that avoid order violations Brian D. Barrick, Kimberly M. Fernsler, Dwain A. Hicks, Takeki Osanai 2007-11-27 $7,635,000
6957305 Data streaming mechanism in a microprocessor David Shippy 2005-10-18 $9,308,000
6915415 Method and apparatus for mapping software prefetch instructions to hardware prefetch logic Michael John Mayfield, Francis Patrick O'Connell 2005-07-05 $5,545,000
6574712 Software prefetch system and method for predetermining amount of streamed data James Allan Kahle, Michael John Mayfield, Francis Patrick O'Connell, Edward John Silha, Joel M. Tendler 2003-06-03 $9,669,000
6535962 System and method for prefetching data using a hardware prefetch mechanism Michael John Mayfield, Francis Patrick O'Connell 2003-03-18 $13,080,000
6463514 Method to arbitrate for a cache block Shih-Hsiung S. Tung, Pei-Chun Liu 2002-10-08 $10,352,000
6460115 System and method for prefetching data to multiple levels of cache including selectively using a software hint to override a hardware prefetch mechanism James Allan Kahle, Michael John Mayfield, Francis Patrick O'Connell, Edward John Silha, Joel M. Tendler 2002-10-01 $10,556,000
6446167 Cache prefetching of L2 and L3 Michael John Mayfield, Francis Patrick O'Connell 2002-09-03 $9,688,000