Issued Patents All Time
Showing 25 most recent of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12175509 | Mobile tobacco receiving station | Hal L. Teegarden, John Stewart Livesay, Isidro Gomez | 2024-12-24 |
| 11550723 | Method, apparatus, and system for memory bandwidth aware data prefetching | Niket K. Choudhary, Thomas Philip Speier, Eric F. Robinson, Harold W. Cain, III, Nikhil Narendradev Sharma +3 more | 2023-01-10 |
| 11061822 | Method, apparatus, and system for reducing pipeline stalls due to address translation misses | Pritha Ghoshal, Niket K. Choudhary, Ravi Rajagopalan, Patrick Eibl, Brian Michael Stempel +1 more | 2021-07-13 |
| 10664275 | Speeding up younger store instruction execution after a sync instruction | Susan E. Eisen, Hung Q. Le, Bryan Lloyd, Dung Q. Nguyen, Benjamin W. Stolt +1 more | 2020-05-26 |
| 10572920 | Mobile tobacco receiving station | Hal L. Teegarden, John Stewart Livesay, Isidro Gomez | 2020-02-25 |
| 10067765 | Speeding up younger store instruction execution after a sync instruction | Susan E. Eisen, Hung Q. Le, Bryan Lloyd, Dung Q. Nguyen, Benjamin W. Stolt +1 more | 2018-09-04 |
| 9389867 | Speculative finish of instruction execution in a processor core | Sundeep Chadha, Bryan Lloyd, Dung Q. Nguyen, Benjamin W. Stolt | 2016-07-12 |
| 9384002 | Speculative finish of instruction execution in a processor core | Sundeep Chadha, Bryan Lloyd, Dung Q. Nguyen, Benjamin W. Stolt | 2016-07-05 |
| 8156287 | Adaptive data prefetch | Pradip Bose, Alper Buyuktosunoglu, Miles Robert Dooley, Michael Stephen Floyd, Bruce Joseph Ronchetti | 2012-04-10 |
| 8086801 | Loading data to vector renamed register from across multiple cache lines | David A. Hrusecky, Bruce Joseph Ronchetti, Shih-Hsiung S. Tung | 2011-12-27 |
| 8082423 | Generating a flush vector from a first execution unit directly to every other execution unit of a plurality of execution units in order to block all register updates | Christopher M. Abernathy, Kurt A. Feiste, David Shippy, Albert J. Van Norstrand, Jr. | 2011-12-20 |
| 7953960 | Method and apparatus for delaying a load miss flush until issuing the dependent instruction | Kurt A. Feiste, David Shippy, Albert J. Van Norstrand, Jr. | 2011-05-31 |
| 7769985 | Load address dependency mechanism system and method in a high frequency, low power processor system | Brian D. Barrick, Kimberly M. Fernsler, Dwain A. Hicks, David Shippy, Takeki Osanai | 2010-08-03 |
| 7730290 | Systems for executing load instructions that achieve sequential load consistency | Brian D. Barrick, Kimberly M. Fernsler, Dwain A. Hicks, Takeki Osanai | 2010-06-01 |
| 7464242 | Method of load/store dependencies detection with dynamically changing address length | Brian D. Barrick, Dwain A. Hicks, Takeki Osanai | 2008-12-09 |
| 7376816 | Method and systems for executing load instructions that achieve sequential load consistency | Brian D. Barrick, Kimberly M. Fernsler, Dwain A. Hicks, Takeki Osanai | 2008-05-20 |
| 7363468 | Load address dependency mechanism system and method in a high frequency, low power processor system | Brian D. Barrick, Kimberly Marie Fensler, Dwain A. Hicks, David Shippy, Takeki Osanai | 2008-04-22 |
| 7302527 | Systems and methods for executing load instructions that avoid order violations | Brian D. Barrick, Kimberly M. Fernsler, Dwain A. Hicks, Takeki Osanai | 2007-11-27 |
| 6957305 | Data streaming mechanism in a microprocessor | David Shippy | 2005-10-18 |
| 6915415 | Method and apparatus for mapping software prefetch instructions to hardware prefetch logic | Michael John Mayfield, Francis Patrick O'Connell | 2005-07-05 |
| 6574712 | Software prefetch system and method for predetermining amount of streamed data | James Allan Kahle, Michael John Mayfield, Francis Patrick O'Connell, Edward John Silha, Joel M. Tendler | 2003-06-03 |
| 6535962 | System and method for prefetching data using a hardware prefetch mechanism | Michael John Mayfield, Francis Patrick O'Connell | 2003-03-18 |
| 6463514 | Method to arbitrate for a cache block | Shih-Hsiung S. Tung, Pei-Chun Liu | 2002-10-08 |
| 6460115 | System and method for prefetching data to multiple levels of cache including selectively using a software hint to override a hardware prefetch mechanism | James Allan Kahle, Michael John Mayfield, Francis Patrick O'Connell, Edward John Silha, Joel M. Tendler | 2002-10-01 |
| 6446167 | Cache prefetching of L2 and L3 | Michael John Mayfield, Francis Patrick O'Connell | 2002-09-03 |