Issued Patents All Time
Showing 26–41 of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7301236 | Increasing electromigration lifetime and current density in IC using vertically upwardly extending dummy via | Stephen E. Greco, Paul S. McLaughlin | 2007-11-27 |
| 7247946 | On-chip Cu interconnection using 1 to 5 nm thick metal cap | John Bruley, Roy A. Carruthers, Lynne M. Gignac, Eric G. Liniger, Sandra G. Malhotra +1 more | 2007-07-24 |
| 7064064 | Copper recess process with application to selective capping and electroless plating | Shyng-Tsong Chen, Timothy J. Dalton, Kenneth M. Davis, Fen F. Jamin, Steffen K. Kaldor +11 more | 2006-06-20 |
| 6975032 | Copper recess process with application to selective capping and electroless plating | Shyng-Tsong Chen, Timothy J. Dalton, Kenneth M. Davis, Fen F. Jamin, Steffen K. Kaldor +11 more | 2005-12-13 |
| 6946716 | Electroplated interconnection structures on integrated circuit chips | Panayotis Andricacos, Harikilia Deligianni, John O. Dukovic, Daniel C. Edelstein, Wilma Jean Horkans +4 more | 2005-09-20 |
| 6709562 | Method of making electroplated interconnection structures on integrated circuit chips | Panayotis Andricacos, Hariklia Deligianni, John O. Dukovic, Daniel C. Edelstein, Wilma Jean Horkans +4 more | 2004-03-23 |
| 6573606 | Chip to wiring interface with single metal alloy layer applied to surface of copper interconnect | Carlos J. Sambucetti, Xiaomeng Chen, Soon-Cheon Seo, Birenda Nath Agarwala, Naftali E. Lustig +1 more | 2003-06-03 |
| 6503641 | Interconnects with Ti-containing liners | Cyril Cabral, Jr., Roy A. Carruthers, James M. E. Harper, Kim Y. Lee, Ismail C. Noyan +2 more | 2003-01-07 |
| 6448173 | Aluminum-based metallization exhibiting reduced electromigration and method therefor | Lawrence A. Clevenger, Ronald G. Filippi, Kenneth P. Rodbell, Roy Iggulden, Lynne M. Gignac +3 more | 2002-09-10 |
| 6399496 | Copper interconnection structure incorporating a metal seed layer | Daniel C. Edelstein, James M. E. Harper, Andrew H. Simon, Cyprian Emeka Uzoh | 2002-06-04 |
| 6380075 | Method for forming an open-bottom liner for a conductor in an electronic structure and device formed | Cyril Cabral, Jr., Sandra G. Malhotra, Fenton R. McFeely, Stephen M. Rossnagel, Andrew H. Simon | 2002-04-30 |
| 6342733 | Reduced electromigration and stressed induced migration of Cu wires by surface coating | Robert Rosenberg, Judith M. Rubino, Carlos J. Sambucetti, Anthony K. Stamper | 2002-01-29 |
| 6181012 | Copper interconnection structure incorporating a metal seed layer | Daniel C. Edelstein, James M. E. Harper, Andrew H. Simon, Cyprian Emeka Uzoh | 2001-01-30 |
| 6090710 | Method of making copper alloys for chip and package interconnections | Panayotis Andricacos, Hariklia Deligianni, James M. E. Harper, Dale J. Pearson, Scott K. Reynolds +2 more | 2000-07-18 |
| 6063506 | Copper alloys for chip and package interconnections | Panayotis Andricacos, Hariklia Deligianni, James M. E. Harper, Dale J. Pearson, Scott K. Reynolds +2 more | 2000-05-16 |
| 5055158 | Planarization of Josephson integrated circuit | William J. Gallagher, Mark A. Jaso, Mark B. Ketchen, Alan W. Kleinsasser, Dale J. Pearson | 1991-10-08 |