Issued Patents All Time
Showing 51–75 of 127 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6642145 | Method of manufacturing an integrated circuit with a dielectric diffusion barrier layer formed between interconnects and interlayer dielectric layers | Pin-Chin Connie Wang, Minh Van Ngo | 2003-11-04 |
| 6624642 | Metal bridging monitor for etch and CMP endpoint detection | Christopher F. Lyons, Ramkumar Subramanian | 2003-09-23 |
| 6599827 | Methods of forming capped copper interconnects with improved electromigration resistance | Minh Van Ngo, Amit P. Marathe, Hartmut Ruelke | 2003-07-29 |
| 6596637 | Chemically preventing Cu dendrite formation and growth by immersion | Diana M. Schonauer, Kai Yang | 2003-07-22 |
| 6593632 | Interconnect methodology employing a low dielectric constant etch stop layer | Minh Van Ngo, Angela T. Hui, Chun Jiang, Hamid Partovi | 2003-07-15 |
| 6562185 | Wafer based temperature sensors for characterizing chemical mechanical polishing processes | Bhanwar Singh, Bharath Rangarajan, Ramkumar Subramanian | 2003-05-13 |
| 6548336 | Planarization of a polysilicon layer surface by chemical mechanical polish to improve lithography and silicide formation | Steven K. Park | 2003-04-15 |
| 6530997 | Use of gaseous silicon hydrides as a reducing agent to remove re-sputtered silicon oxide | Larry Wang | 2003-03-11 |
| 6528409 | Interconnect structure formed in porous dielectric material with minimized degradation and electromigration | Sergey Lopatin, Fei Wang, Diana M. Schonauer | 2003-03-04 |
| 6525428 | Graded low-k middle-etch stop layer for dual-inlaid patterning | Minh Van Ngo, Christy Mei-Chu Woo, John Sanchez | 2003-02-25 |
| 6518185 | Integration scheme for non-feature-size dependent cu-alloy introduction | Pin-Chin Connie Wang, Fei Wang, Kashmir Sahota, Amit P. Marathe, Matthew S. Buynoski +2 more | 2003-02-11 |
| 6506677 | Method of forming capped copper interconnects with reduced hillock formation and improved electromigration resistance | Minh Van Ngo, Amit P. Marathe, Hartmut Ruelke | 2003-01-14 |
| 6503418 | Ta barrier slurry containing an organic additive | Kashmir Sahota, Diana M. Schonauer | 2003-01-07 |
| 6500754 | Anneal hillock suppression method in integrated circuit interconnects | Darrell M. Erb, Alline F. Myers | 2002-12-31 |
| 6500743 | Method of copper-polysilicon T-gate formation | Sergey Lopatin, Matthew S. Buynoski | 2002-12-31 |
| 6469385 | Integrated circuit with dielectric diffusion barrier layer formed between interconnects and interlayer dielectric layers | Pin-Chin Connie Wang, Minh Van Ngo | 2002-10-22 |
| 6465156 | Method for mitigating formation of silicon grass | Bhanwar Singh, Bharath Rangarajan | 2002-10-15 |
| 6454916 | Selective electroplating with direct contact chemical polishing | Fei Wang, Darrell M. Erb | 2002-09-24 |
| 6433379 | Tantalum anodization for in-laid copper metallization capacitor | Sergey Lopatin, Qi Xiang, Matthew S. Buynoski | 2002-08-13 |
| 6432822 | Method of improving electromigration resistance of capped Cu | Minh Van Ngo, Amit P. Marathe | 2002-08-13 |
| 6422918 | Chemical-mechanical polishing of photoresist layer | Bhanwar Singh, Bharath Rangarajan, Alvin M. Dangca | 2002-07-23 |
| 6417100 | Annealing ambient in integrated circuit interconnects | Pin-Chin Connie Wang, Minh Van Ngo | 2002-07-09 |
| 6413869 | Dielectric protected chemical-mechanical polishing in integrated circuit interconnects | Krishnashree Achuthan, Kashmir Sahota | 2002-07-02 |
| 6410443 | Method for removing semiconductor ARC using ARC CMP buffing | Stephen Keetai Park, Kashmir Sahota, David Matsumoto, Mark T. Ramsbey | 2002-06-25 |
| 6403474 | Controlled anneal conductors for integrated circuit interconnects | Pin-Chin Connie Wang, Minh Van Ngo | 2002-06-11 |