Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
KY

Kai Yang — 34 Patents

AMD: 25 patents #406 of 9,280Top 5%
YCYoung Fast Optoelectronics Co.: 4 patents #6 of 16Top 40%
UNUnknown: 1 patents #29,356 of 83,584Top 40%
Fremont, CA: #432 of 9,298 inventorsTop 5%
California: #14,619 of 386,348 inventorsTop 4%
Overall (All Time): #100,737 of 4,157,543Top 3%
34 Patents All Time
Kai Yang has been granted 34 US patents while listed as an inventor at AMD. The first was granted in 2000 and the most recent in December 2025. Kai Yang ranks #100,737 of 4,157,543 US inventors in our database (top 2.4%). Patent records list Kai Yang in Fremont, CA, US.

Issued Patents All Time

Showing 1–25 of 34 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12500093 Composite particulates for use as part of a supporting fill mixture in a semicondutor substrate stacking application Kuo-Wei Wu, Hau-Yi Hsiao, Ching-Wei Yang, Shin-Hui Chen, Chung-Yi Yu +1 more 2025-12-16
9007778 Signal wiring of touch panel Hsing-Ming Chang, Zhi-Wei Feng 2015-04-14
8780067 Bridging structure for signal transmission of touch panel Hsing-Ming Chang 2014-07-15
8520380 Frame of touch panel 2013-08-27
8486284 Method for forming a touch sensing pattern and signal wires Chih-Cheng Chang, Chih-Yung Liu, Chen Yang 2013-07-16
8169417 Signal transfer assembly of touch panel 2012-05-01
8125460 Method for manufacturing touch panel with glass panel layer and glass substrate 2012-02-28
8119937 Capacitive touch panel 2012-02-21
7992292 Method for manufacturing a touch panel 2011-08-09
7132363 Stabilizing fluorine etching of low-k materials Darrell M. Erb, Fei Wang 2006-11-07 $14,140,000
6924220 Self-aligned gate formation using polysilicon polish with peripheral protective layer John Jianshi Wang, Unsoon Kim 2005-08-02 $7,108,000
6734559 Self-aligned semiconductor interconnect barrier and manufacturing method therefor Takeshi Nogami, Dirk Brown, Shekhar Pramanick 2004-05-11 $5,065,000
6699785 Conductor abrasiveless chemical-mechanical polishing in integrated circuit interconnects Kashmir Sahota, Steven C. Avanzino 2004-03-02 $3,635,000
6605843 Fully depleted SOI device with tungsten damascene contacts and method of forming same Zoran Krivokapic, Allison Holbrook, Sunny Cherian 2003-08-12 $3,677,000
6596637 Chemically preventing Cu dendrite formation and growth by immersion Diana M. Schonauer, Steven C. Avanzino 2003-07-22 $3,195,000
6468894 Metal interconnection structure with dummy vias Suzette K. Pangrle 2002-10-22 $2,399,000
6410418 Recess metallization via selective insulator formation on nucleation/seed layer 2002-06-25 $2,000,000
6410442 Mask-less differential etching and planarization of copper films 2002-06-25 $2,000,000
6350687 Method of fabricating improved copper metallization including forming and removing passivation layer before forming capping film Steven C. Avanzino, Sergey Lopatin, Todd P. Lukanc 2002-02-26 $4,948,000
6350678 Chemical-mechanical polishing of semiconductors Shekhar Pramanick 2002-02-26 $4,948,000
6332989 Slurry for chemical mechanical polishing of copper Steven C. Avanzino, Christy Mei-Chu Woo 2001-12-25
6319833 Chemically preventing copper dendrite formation and growth by spraying Diana M. Schonauer, Steven C. Avanzino 2001-11-20 $3,380,000
6259115 Dummy patterning for semiconductor manufacturing processes Lu You, Simon S. Chan 2001-07-10 $4,638,000
6218290 Copper dendrite prevention by chemical removal of dielectric Diana M. Schonauer, Steven C. Avanzino 2001-04-17 $5,863,000
6207569 Prevention of Cu dendrite formation and growth Diana M. Schonauer, Steven C. Avanzino 2001-03-27 $5,495,000