JH

Joerg Hohage

AM AMD: 25 patents #398 of 9,279Top 5%
Globalfoundries: 6 patents #578 of 4,424Top 15%
Overall (All Time): #119,485 of 4,157,543Top 3%
31
Patents All Time

Issued Patents All Time

Showing 25 most recent of 31 patents

Patent #TitleCo-InventorsDate
8841140 Technique for forming a passivation layer without a terminal metal Tobias Letz, Matthias Lehr, Frank Kuechenmeister 2014-09-23
8828888 Protection of reactive metal surfaces of semiconductor devices during shipping by providing an additional protection layer Matthias Lehr, Andreas Ott 2014-09-09
8759232 Compressive stress transfer in an interlayer dielectric of a semiconductor device by providing a bi-layer of superior adhesion and internal stress Hartmut Ruelke, Ralf Richter 2014-06-24
8546274 Interlayer dielectric material in a semiconductor device comprising stressed layers with an intermediate buffer material Michael Finken, Ralf Richter 2013-10-01
8450172 Non-insulating stressed material layers in a contact level of semiconductor devices Ralf Richter, Hartmut Ruelke 2013-05-28
8338284 Stress engineering in a contact level of semiconductor devices by stressed conductive layers and an isolation spacer Kai Frohberg, Hartmut Ruelke, Volker Jaschke, Frank Seliger 2012-12-25
8211795 Method of forming a dielectric cap layer for a copper metallization by using a hydrogen based thermal-chemical treatment Volker Kahlert, Hartmut Ruelke, Ulrich Mayer 2012-07-03
8153524 Providing superior electromigration performance and reducing deterioration of sensitive low-k dielectrics in metallization systems of semiconductor devices Oliver Aubel, Frank Feustel, Axel Preusse 2012-04-10
8053354 Reduced wafer warpage in semiconductors by stress engineering in the metallization system Matthias Lehr, Frank Koschinsky 2011-11-08
8034726 Interlayer dielectric material in a semiconductor device comprising a doublet structure of stressed materials Ralf Richter, Michael Finken, Heike Salz 2011-10-11
7994059 Enhanced stress transfer in an interlayer dielectric by using an additional stress layer above a dual stress liner in a semiconductor device Ralf Richter, Martin Gerhardt, Martin Mazur 2011-08-09
7994072 Stress transfer by sequentially providing a highly stressed etch stop material and an interlayer dielectric in a contact layer stack of a semiconductor device Michael Finken, Ralf Richter 2011-08-09
7938973 Arc layer having a reduced flaking tendency and a method of manufacturing the same Ralf Richter, Martin Mazur 2011-05-10
7906383 Stress transfer in an interlayer dielectric by providing a stressed dielectric layer above a stress-neutral dielectric material in a semiconductor device Ralf Richter, Andy Wei, Manfred Horstmann 2011-03-15
7875561 Interlayer dielectric material in a semiconductor device comprising stressed layers with an intermediate buffer material Michael Finken, Ralf Richter 2011-01-25
7867917 Etch stop layer for a metallization layer with enhanced adhesion, etch selectivity and hermeticity Matthias Lehr, Volker Kahlert 2011-01-11
7858531 Method of forming a semiconductor structure comprising a field effect transistor having a stressed channel region Ralf Richter, Michael Finken, Jana Schlott 2010-12-28
7678699 Method of forming an insulating capping layer for a copper metallization layer by using a silane reaction Matthias Lehr, Volker Kahlert 2010-03-16
7608912 Technique for creating different mechanical strain in different CPU regions by forming an etch stop layer having differently modified intrinsic stress Kai Frohberg, Thomas Werner 2009-10-27
7550396 Method for reducing resist poisoning during patterning of silicon nitride layers in a semiconductor device Kai Frohberg, Volker Grimm, Sven Mueller, Matthias Lehr, Ralf Richter +4 more 2009-06-23
7491638 Method of forming an insulating capping layer for a copper metallization layer Matthias Lehr, Volker Kahlert 2009-02-17
7476626 Etch stop layer for a metallization layer with enhanced etch selectivity and hermeticity Matthias Lehr, Volker Kahlert 2009-01-13
7396718 Technique for creating different mechanical strain in different channel regions by forming an etch stop layer stack having differently modified intrinsic stress Kai Frohberg, Matthias Schaller, Holger Schuehrer 2008-07-08
7381602 Method of forming a field effect transistor comprising a stressed channel region Hartmut Ruelke, Kai Frohberg 2008-06-03
7341903 Method of forming a field effect transistor having a stressed channel region Hartmut Ruelke, Kai Frohberg 2008-03-11