Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Frank Koschinsky — 16 Patents

Globalfoundries: 8 patents #444 of 4,424Top 15%
AMD: 8 patents #1,649 of 9,280Top 20%
Radebeul, DE: #15 of 243 inventorsTop 7%
Overall (All Time): #284,196 of 4,157,543Top 7%
16 Patents All Time
Frank Koschinsky has been granted 16 US patents while listed as an inventor at AMD. The first was granted in 2003 and the most recent in October 2018. Frank Koschinsky ranks #284,196 of 4,157,543 US inventors in our database (top 6.8%). Patent records list Frank Koschinsky in Radebeul, DE.

Issued Patents All Time

Showing 1–16 of 16 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
10090195 Method including a formation of a diffusion barrier and semiconductor structure including a diffusion barrier Bernd Hintze, Heiko Weber 2018-10-02 $17,112,000
9177858 Methods for fabricating integrated circuits including barrier layers for interconnect structures Xunyuan Zhang, Tibor Bolom, Kun Ho Ahn, Bernd Hintze 2015-11-03 $718,000
9177826 Methods of forming metal nitride materials Bernd Hintze 2015-11-03 $718,000
9171754 Method including an etching of a portion of an interlayer dielectric in a semiconductor structure, a degas process and a preclean process Bernd Hintze, Oliver Witnik 2015-10-27 $712,000
9147618 Method for detecting defects in a diffusion barrier layer Bernd Hintze, Dirk Utess 2015-09-29 $1,017,000
8585877 Multi-step deposition control Roland Jaeger, Frank Wagenbreth 2013-11-19 $2,505,000
8323989 Test system and method of reducing damage in seed layers in metallization systems of semiconductor devices Frank Feustel, Tobias Letz 2012-12-04 $1,677,000
8163571 Multi-step deposition control Roland Jaeger, Frank Wagenbreth 2012-04-24 $12,212,000
8058081 Method of testing an integrity of a material layer in a semiconductor structure Moritz Andreas Meyer, Eckhard Langer 2011-11-15 $6,438,000
8053354 Reduced wafer warpage in semiconductors by stress engineering in the metallization system Matthias Lehr, Joerg Hohage 2011-11-08 $4,445,000
8039400 Reducing contamination of semiconductor substrates during BEOL processing by performing a deposition/etch cycle during barrier deposition Matthias Lehr, Holger Schuehrer 2011-10-18 $1,986,000
7820536 Method for removing a passivation layer prior to depositing a barrier layer in a copper metallization layer Holger Schuehrer, Tobias Letz 2010-10-26 $18,913,000
7063091 Method for cleaning the surface of a substrate Volker Kahlert, Peter Huebler 2006-06-20 $7,818,000
6964874 Void formation monitoring in a damascene process Thomas Werner, Peter Hübler 2005-11-15 $25,400,000
6716650 Interface void monitoring in a damascene process Eckhard Langer, Volker Kahlert, Peter Hübler 2004-04-06 $3,021,000
6613660 Metallization process sequence for a barrier metal layer Volker Kahlert, Peter Hübler 2003-09-02 $4,831,000