HS

Holger Schuehrer

Globalfoundries: 9 patents #393 of 4,424Top 9%
AM AMD: 6 patents #1,863 of 9,279Top 25%
GU Globalfoundries U.S.: 1 patents #344 of 665Top 55%
Overall (All Time): #294,469 of 4,157,543Top 8%
16
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11127674 Back end of the line metal structure and method Dirk Breuer, Oliver Witnik, Carla Byloos 2021-09-21
8951907 Semiconductor devices having through-contacts and related fabrication methods Ralf Richter, Jens Heinrich 2015-02-10
8426312 Method of reducing contamination by providing an etch stop layer at the substrate edge Ralf Richter, Tobias Letz 2013-04-23
8384161 Contact optimization for enhancing stress transfer in closely spaced transistors Ralf Richter, Kai Frohberg 2013-02-26
8212346 Method and apparatus for reducing semiconductor package tensile stress E. Todd Ryan, Seung-Hyun Rhee 2012-07-03
8129276 Void sealing in a dielectric material of a contact level of a semiconductor device comprising closely spaced transistors Ralf Richter, Kai Frohberg 2012-03-06
8097536 Reducing metal voids in a metallization layer stack of a semiconductor device by providing a dielectric barrier layer Juergen Boemmels 2012-01-17
8039400 Reducing contamination of semiconductor substrates during BEOL processing by performing a deposition/etch cycle during barrier deposition Frank Koschinsky, Matthias Lehr 2011-10-18
7820536 Method for removing a passivation layer prior to depositing a barrier layer in a copper metallization layer Tobias Letz, Frank Koschinsky 2010-10-26
7781343 Semiconductor substrate having a protection layer at the substrate back side Tobias Letz, Markus Nopper 2010-08-24
7763476 Test structure for determining characteristics of semiconductor alloys in SOI transistors by x-ray diffraction Kai Frohberg, Thomas Werner 2010-07-27
7638424 Technique for non-destructive metal delamination monitoring in semiconductor devices Ralf Richter, Carsten Peters 2009-12-29
7491555 Method and semiconductor structure for monitoring the fabrication of interconnect structures and contacts in a semiconductor device Matthias Lehr, Kai Frohberg 2009-02-17
7410885 Method of reducing contamination by removing an interlayer dielectric from the substrate edge Christin Bartsch, Carsten Hartig 2008-08-12
7396718 Technique for creating different mechanical strain in different channel regions by forming an etch stop layer stack having differently modified intrinsic stress Kai Frohberg, Matthias Schaller, Joerg Hohage 2008-07-08
7259091 Technique for forming a passivation layer prior to depositing a barrier layer in a copper metallization layer Carsten Hartig, Christin Bartsch, Kai Frohberg 2007-08-21