{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "AMD", "item": "https://www.patentleaderboard.com/company/amd"}, {"@type": "ListItem", "position": 3, "name": "Carsten Hartig", "item": "https://www.patentleaderboard.com/inventor/fl:ca_ln:hartig-1"}]}
Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Carsten Hartig — 14 Patents

AMD: 8 patents #1,555 of 9,280Top 20%
Globalfoundries: 5 patents #673 of 4,424Top 20%
GPGlobalfoundries Singapore Pte.: 1 patents #427 of 828Top 55%
Meerane, DE: #1 of 12 inventorsTop 9%
Overall (All Time): #332,869 of 4,157,543Top 9%
14 Patents All Time
Carsten Hartig has been granted 14 US patents while listed as an inventor at AMD. The first was granted in 2004 and the most recent in October 2018. Carsten Hartig ranks #332,869 of 4,157,543 US inventors in our database (top 8.0%). Patent records list Carsten Hartig in Meerane, DE.

Patents per Year

Patents granted per year, 2004 to 2018Bar chart with a peak of 4 patents in 2015.peak 42004: 2 patents20042005: 2 patents20052006: 1 patents20062007: 1 patents20072008: 1 patents20082010: 1 patents20102014: 1 patents20142015: 4 patents20152018: 1 patents2018

Issued Patents All Time

Showing 1–14 of 14 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
10115621 Method for in-die overlay control using FEOL dummy fill layer Peter Moll, Martin Schmidt, Matthias Ruhm, Stefan Thierbach, Stefan Rongen +3 more 2018-10-30 $22,881,000
9177873 Systems and methods for fabricating semiconductor device structures Alok Vaid, Lokesh Subramany 2015-11-03 $718,000
9171765 Inline residual layer detection and characterization post via post etch using CD-SEM Daniel Fischer 2015-10-27 $712,000
9091667 Detection of particle contamination on wafers Adam Michal Urbanowicz, Daniel Fischer 2015-07-28 $933,000
9029855 Layout for reticle and wafer scanning electron microscope registration or overlay measurements Guo Xiang Ning, Paul Ackmann, Fanghong Gn 2015-05-12
8892237 Systems and methods for fabricating semiconductor device structures using different metrology tools Alok Vaid 2014-11-18 $1,887,000
7663766 Incorporating film optical property measurements into scatterometry metrology Jason P. Cain 2010-02-16 $19,031,000
7410885 Method of reducing contamination by removing an interlayer dielectric from the substrate edge Holger Schuehrer, Christin Bartsch 2008-08-12 $9,390,000
7259091 Technique for forming a passivation layer prior to depositing a barrier layer in a copper metallization layer Holger Schuehrer, Christin Bartsch, Kai Frohberg 2007-08-21 $20,186,000
7098140 Method of compensating for etch rate non-uniformities by ion implantation Matthias Schaller, Christoph Schwan 2006-08-29 $13,087,000
6936383 Method of defining the dimensions of circuit elements by using spacer deposition techniques Martin Mazur, Georg Sulzer 2005-08-30 $5,346,000
6838010 System and method for wafer-based controlled patterning of features with critical dimensions Gunter Grasshoff 2005-01-04 $7,312,000
6724096 Die corner alignment structure Thomas Werner, Gunter Grasshoff, Bernd Schulz 2004-04-20 $2,632,000
6720242 Method of forming a substrate contact in a field effect transistor formed over a buried insulator layer Gert Burbach, Frank Heinlein, Johannes Groschopf, Gotthard Jungnickel, Hartmut Ruelke 2004-04-13 $3,617,000