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Semiconductor device including a hybrid metallization layer stack for enhanced mechanical strength during and after packaging |
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2014-04-15 |
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Etch stop layer of reduced thickness for patterning a dielectric material in a contact level of closely spaced transistors |
Karsten Wieczorek, Manfred Horstmann, Kerstin Ruttloff |
2012-01-17 |
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Technique for forming embedded metal lines having increased resistance against stress-induced material transport |
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2011-10-18 |
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Method of patterning a low-k dielectric using a hard mask |
Matthias Lehr, Christian Zistl |
2008-08-26 |
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Metal line having an increased resistance to electromigration along an interface of a dielectric barrier layer by implanting material into the metal line |
Hans-Juergen Engelmann, Ehrenfried Zschech |
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| 7063091 |
Method for cleaning the surface of a substrate |
Frank Koschinsky, Volker Kahlert |
2006-06-20 |