Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 8698312 | Semiconductor device including a hybrid metallization layer stack for enhanced mechanical strength during and after packaging | Frank Feustel, Christian Zistl, Peter Huebler | 2014-04-15 | $4,275,000 |
| 7671362 | Test structure for determining optimal seed and liner layer thicknesses for dual damascene processing | Tibor Bolom, Kaushik Chanda, Ronald G. Filippi, Stephan Grunow, Paul S. McLaughlin +3 more | 2010-03-02 | |
| 7465639 | Method for fabricating an SOI device | Mario M. Pelella, Richard K. Klein | 2008-12-16 | $5,569,000 |
| 7309654 | Technique for reducing etch damage during the formation of vias and trenches in interlayer dielectrics | Matthias Schaller, Massud Aminpur | 2007-12-18 | $12,803,000 |
| 6709954 | Scribe seal structure and method of manufacture | — | 2004-03-23 | $3,151,000 |