Issued Patents All Time
Showing 25 most recent of 38 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12341111 | Crackstop structures | Ranjan Rajoo, Dirk Breuer | 2025-06-24 |
| 11907623 | Chip module structure and method and system for chip module design using chip-package co-optimization | Saquib B. Halim, Marcel Wieland | 2024-02-20 |
| 11855005 | Crackstop with embedded passive radio frequency noise suppressor and method | Nicholas A. Polomoff, Richard F. Taylor, III, Saquib B. Halim | 2023-12-26 |
| 11804440 | Chip module with robust in-package interconnects | Saquib B. Halim, Kashi Vishwanath Machani, Christian Goetze | 2023-10-31 |
| 11740418 | Barrier structure with passage for waveguide in photonic integrated circuit | Nicholas A. Polomoff, John J. Ellis-Monaghan, Jae Kyu Cho, Michal Rakowski | 2023-08-29 |
| 11652069 | Crackstop structures | Ranjan Rajoo, Dirk Breuer | 2023-05-16 |
| 11543606 | Photonics chips with an edge coupler and a continuous crackstop | Nicholas A. Polomoff, Jae Kyu Cho, John J. Ellis-Monaghan, Michal Rakowski | 2023-01-03 |
| 9570430 | Articles including bonded metal structures and methods of preparing the same | Christian Klewer, Jens Oswald | 2017-02-14 |
| 9478489 | Semiconductor dies with reduced area consumption | Daniel Richter | 2016-10-25 |
| 9449907 | Stacked semiconductor chips packaging | Lei Fu, Michael Z. Su | 2016-09-20 |
| 8957524 | Pillar structure for use in packaging integrated circuit products and methods of making such a pillar structure | Dirk Breuer, Jens Paul, Kashi Vishwanath Machani | 2015-02-17 |
| 8920027 | Assessing thermal mechanical characteristics of complex semiconductor devices by integrated heating systems | Michael Grillberger, Matthias Lehr, Steffen Koch | 2014-12-30 |
| 8841140 | Technique for forming a passivation layer without a terminal metal | Tobias Letz, Matthias Lehr, Joerg Hohage | 2014-09-23 |
| 8664025 | Substrate dicing technique for separating semiconductor dies with reduced area consumption | Daniel Richter | 2014-03-04 |
| 8624404 | Integrated circuit package having offset vias | Michael Z. Su, Lei Fu | 2014-01-07 |
| 8580672 | Methods of forming bump structures that include a protection layer | Lothar Lehmann, Alexander Platz, Gotthard Jungnickel, Sven Kosgalwies | 2013-11-12 |
| 8561446 | Method and device for fabricating bonding wires on the basis of microelectronic manufacturing techniques | Matthias Lehr, Frank Seliger | 2013-10-22 |
| 8479578 | Assessing metal stack integrity in sophisticated semiconductor devices by mechanically stressing die contacts | Holm Geisler, Matthias Lehr, Michael Grillberger | 2013-07-09 |
| 8384218 | Back side metallization with superior adhesion in high-performance semiconductor devices | Soeren Zenner, Gotthard Jungnickel | 2013-02-26 |
| 8357268 | System for driving and controlling a movable electrode assembly in an electrochemical process tool | Michael Pietzner, Mario Illgen, Kerstin Siury | 2013-01-22 |
| 8293636 | Conductive connection structure with stress reduction arrangement for a semiconductor device, and related fabrication method | Thomas Schulze, Michael Z. Su, Lei Fu | 2012-10-23 |
| 8283247 | Semiconductor device including a die region designed for aluminum-free solder bump connection and a test structure designed for aluminum-free wire bonding | Matthias Lehr, Steffi Thierbach | 2012-10-09 |
| 8216880 | Wire bonding on reactive metal surfaces of a metallization of a semiconductor device by providing a protection layer | Matthias Lehr | 2012-07-10 |
| 8174131 | Semiconductor device having a filled trench structure and methods for fabricating the same | Zhen Zhang, Jaime Bravo, Michael Z. Su, Ranjit Gannamani, Kevin Lim | 2012-05-08 |
| 8043956 | Wire bonding on reactive metal surfaces of a metallization of a semiconductor device by providing a protective layer | Matthias Lehr | 2011-10-25 |