CL

Christopher F. Lyons

AM AMD: 130 patents #16 of 9,279Top 1%
IBM: 11 patents #9,995 of 70,183Top 15%
SL Spansion Llc.: 3 patents #241 of 769Top 35%
CL Clariant Finance (Bvi) Limited: 1 patents #235 of 535Top 45%
PO Polychrome: 1 patents #17 of 34Top 50%
📍 Wappingers Falls, NY: #7 of 884 inventorsTop 1%
🗺 New York: #259 of 115,490 inventorsTop 1%
Overall (All Time): #6,500 of 4,157,543Top 1%
147
Patents All Time

Issued Patents All Time

Showing 76–100 of 147 patents

Patent #TitleCo-InventorsDate
6417084 T-gate formation using a modified conventional poly process Bhanwar Singh, Marina V. Plat, Ramkumar Subramanian 2002-07-09
6403456 T or T/Y gate formation using trim etch processing Marina V. Plat, Bhanwar Singh, Ramkumar Subramanian 2002-06-11
6399284 Sub-lithographic contacts and vias through pattern, CVD and etch back processing 2002-06-04
6391525 Sidewall patterning for sub 100 nm gate conductors 2002-05-21
6383952 RELACS process to double the frequency or pitch of small feature formation Ramkumar Subramanian, Bhanwar Singh, Marina V. Plat, Scott A. Bell 2002-05-07
6380047 Shallow trench isolation formation with two source/drain masks and simplified planarization mask Basab Bandyopadhyay, Nick Kepler, Olov Karlsson, Larry Wang, Effiong Ibok 2002-04-30
6380588 Semiconductor device having uniform spacers William G. En, Minh Van Ngo, Chih-Yuk Yang, David K. Foote, Scott A. Bell +1 more 2002-04-30
6380067 Method for creating partially UV transparent anti-reflective coating for semiconductors Ramkumar Subramanian, Minh Van Ngo, Suzette K. Pangrle, Kashmir Sahota 2002-04-30
6358856 Bright field image reversal for contact hole patterning Ramkumar Subramanian, Marina V. Plat, Todd P. Lukanc 2002-03-19
6350559 Method for creating thinner resist coating that also has fewer pinholes Michael K. Templeton, Kathleen R. Early 2002-02-26
6326231 Use of silicon oxynitride ARC for metal layers Ramkumar Subramanian, Bhanwar Singh, Sanjay K. Yedur, Marina V. Plat, Bharath Rangarajan +1 more 2001-12-04
6326319 Method for coating ultra-thin resist films Christopher Lee Pike, Khanh B. Nguyen 2001-12-04
6319802 T-gate formation using modified damascene processing with two masks Ramkumar Subramanian, Bhanwar Singh, Marina V. Plat 2001-11-20
6319843 Nitride surface passivation for acid catalyzed chemically amplified resist processing 2001-11-20
6316277 Tuning substrate/resist contrast to maximize defect inspection sensitivity for ultra-thin resist in DUV lithography Khoi A. Phan, Khanh B. Nguyen, Jeff Schefske 2001-11-13
6313019 Y-gate formation using damascene processing Ramkumar Subramanian, Bhanwar Singh, Marina V. Plat 2001-11-06
6309926 Thin resist with nitride hard mask for gate etch application Scott A. Bell, Harry J. Levinson, Khanh B. Nguyen, Fei Wang, Chih-Yuh Yang 2001-10-30
6306560 Ultra-thin resist and SiON/oxide hard mask for metal etch Fei Wang, Khanh B. Nguyen, Scott A. Bell, Harry J. Levinson, Chih-Yuh Yang 2001-10-23
6291137 Sidewall formation for sidewall patterning of sub 100 nm structures Michael K. Templeton, Kathleen R. Early 2001-09-18
6287959 Deep submicron metallization using deep UV photoresist Bhanwar Singh 2001-09-11
6270929 Damascene T-gate using a relacs flow Ramkumar Subramanian, Bhanwar Singh, Marina V. Plat 2001-08-07
6255202 Damascene T-gate using a spacer flow Ramkumar Subramanian, Bhanwar Singh, Marina V. Plat 2001-07-03
6245493 Method for reducing surface reflectivity by increasing surface roughness Bhanwar Singh, Bharath Rangarajan, Sanjay K. Yedur, Michael K. Templeton 2001-06-12
6239031 Stepper alignment mark structure for maintaining alignment integrity Nick Kepler, Olov Karlsson, Larry Wang, Basab Bandyopadhyah, Effiong Ibok 2001-05-29
6214737 Simplified sidewall formation for sidewall patterning of sub 100 nm structures Michael K. Templeton, Kathleen R. Early 2001-04-10