KD

Kristof Darmawikarta

IN Intel: 11 patents #133 of 4,378Top 4%
SH Santa Clara Holdings: 1 patents #1 of 17Top 6%
TR Tahoe Research: 1 patents #11 of 144Top 8%
📍 Chandler, AZ: #16 of 601 inventorsTop 3%
🗺 Arizona: #47 of 4,150 inventorsTop 2%
Overall (2023): #4,796 of 537,848Top 1%
13
Patents 2023

Issued Patents 2023

Showing 1–13 of 13 patents

Patent #TitleCo-InventorsDate
11854834 Integrated circuit package supports Robert Alan May, Sri Ranga Sai Boyapati, Srinivas V. Pietambaram, Chung Kwang Christopher Tan, Aleksandar Aleksov 2023-12-26
11837534 Substrate with variable height conductive and dielectric elements Aleksandar Aleksov, Haobo Chen, Changhua Liu, Sri Ranga Sai Boyapati, Bai Nie 2023-12-05
11804455 Substrate integrated thin film capacitors using amorphous high-k dielectrics Aleksandar Aleksov, Thomas L. Sounart, Henning Braunisch, Prithwish Chatterjee, Andrew J. Brown 2023-10-31
11798887 Inorganic-based embedded-die layers for modular semiconductive devices Srinivas V. Pietambaram, Tarek A. Ibrahim, Rahul N. Manepalli, Debendra Mallik, Robert L. Sankman 2023-10-24
11791228 Method for forming embedded grounding planes on interconnect layers Brandon C. Marin, Roy Dittler, Jeremy Ecton, Darko Grujicic 2023-10-17
11784128 Die interconnect substrate, an electrical device and a method for forming a die interconnect substrate Robert Alan May, Sri Ranga Sai Boyapati 2023-10-10
11735531 Panel level packaging for multi-die products interconnected with very high density (VHD) interconnect layers Srinivas V. Pietambaram, Sri Ranga Sai Boyapati, Robert Alan May, Javier Soto Gonzalez, Kwangmo Chris Lim 2023-08-22
11728258 Electroless metal-defined thin pad first level interconnects for lithographically defined vias Aleksandar Aleksov, Veronica Strong, Arnab Sarkar 2023-08-15
11699648 Electromigration resistant and profile consistent contact arrays Srinivas V. Pietambaram, Jung Kyu Han, Ali Lehaf, Steve Cho, Thomas HEATON +3 more 2023-07-11
11652036 Via-trace structures Jeremy Ecton, Hiroki Tanaka, Oscar Ojeda, Arnab Roy, Nicholas S. Haehn 2023-05-16
11605867 Fabricating an RF filter on a semiconductor package using selective seeding Brandon C. Marin, Jeremy Ecton, Aleksandar Aleksov, Yonggang Li, Dilan Seneviratne 2023-03-14
11574874 Package architecture utilizing photoimageable dielectric (PID) for reduced bump pitch Robert Alan May, Sri Ranga Sai Boyapati, Hiroki Tanaka, Srinivas V. Pietambaram, Frank Truong +4 more 2023-02-07
11552010 Dielectric for high density substrate interconnects Robert Alan May, Andrew J. Brown, Sri Ranga Sai Boyapati 2023-01-10