Issued Patents 2021
Showing 51–75 of 85 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11024344 | Landing pad in interconnect and memory stacks: structure and formation of the same | — | 2021-06-01 |
| 11018090 | Selective CVD alignment-mark topography assist for non-volatile memory | Michael Rizzolo, Lawrence A. Clevenger, Benjamin D. Briggs | 2021-05-25 |
| 11018087 | Metal interconnects | Raghuveer R. Patlolla, Cornelius Brown Peethala | 2021-05-25 |
| 11004735 | Conductive interconnect having a semi-liner and no top surface recess | Cornelius Brown Peethala, Michael Rizzolo, Oscar van der Straten | 2021-05-11 |
| 11004736 | Integrated circuit having a single damascene wiring network | Hsueh-Chung Chen, Junli Wang, Somnath Ghosh, Lawrence A. Clevenger | 2021-05-11 |
| 10998227 | Metal insulator metal capacitor with extended capacitor plates | Theodorus E. Standaert | 2021-05-04 |
| 10991619 | Top via process accounting for misalignment by increasing reliability | Chen Zhang, Lawrence A. Clevenger, Benjamin D. Briggs, Brent A. Anderson | 2021-04-27 |
| 10975464 | Hard mask films with graded vertical concentration formed using reactive sputtering in a radio frequency deposition chamber | Ekmini Anuja De Silva, Yongan Xu, Abraham Arceo de la Pena | 2021-04-13 |
| 10971398 | Cobalt interconnect structure including noble metal layer | Theodorus E. Standaert | 2021-04-06 |
| 10971447 | BEOL electrical fuse | Baozhen Li, Andrew Tae Kim | 2021-04-06 |
| 10964647 | Dielectric crack stop for advanced interconnects | Baozhen Li, Griselda Bonilla | 2021-03-30 |
| 10957642 | Resistance tunable fuse structure formed by embedded thin metal layers | Alexander Reznicek, Miaomiao Wang, Donald F. Canaperi | 2021-03-23 |
| 10957657 | Advanced crack stop structure | Baozhen Li, Xiao Hu Liu, Griselda Bonilla | 2021-03-23 |
| 10957643 | Formation of semiconductor devices including electrically programmable fuses | Juntao Li | 2021-03-23 |
| 10950493 | Interconnects having air gap spacers | Kenneth Chun Kuen Cheng, Koichi Motoyama, Oscar van der Straten, Joseph F. Maniscalco | 2021-03-16 |
| 10950787 | Method having resistive memory crossbar array employing selective barrier layer growth | Takashi Ando, Lawrence A. Clevenger | 2021-03-16 |
| 10950662 | Resistive memory device with meshed electrodes | Takashi Ando, Lawrence A. Clevenger, Michael Rizzolo | 2021-03-16 |
| 10950459 | Back end of line structures with metal lines with alternating patterning and metallization schemes | Ruilong Xie, Chanro Park, Kangguo Cheng, Juntao Li | 2021-03-16 |
| 10943972 | Precision BEOL resistors | Baozhen Li, Kirk D. Peterson, John E. Sheets, II, Lawrence A. Clevenger, Junli Wang | 2021-03-09 |
| 10930589 | Advanced interconnects containing an IMT liner | Joseph F. Maniscalco, Andrew Tae Kim, Baozhen Li | 2021-02-23 |
| 10930520 | Self-formed liner for interconnect structures | — | 2021-02-23 |
| 10916501 | Back end of line electrical fuse structure and method of fabrication | Benjamin D. Briggs, Lawrence A. Clevenger, Michael Rizzolo | 2021-02-09 |
| 10916699 | Resistive memory crossbar array employing selective barrier layer growth | Takashi Ando, Lawrence A. Clevenger | 2021-02-09 |
| 10916503 | Back end of line metallization structure | — | 2021-02-09 |
| 10910307 | Back end of line metallization structure | Raghuveer R. Patlolla, James J. Kelly, Cornelius Brown Peethala | 2021-02-02 |
