Issued Patents 2019
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10510892 | Forming a sacrificial liner for dual channel devices | Huiming Bu, Kangguo Cheng, Dechao Guo, Peng Xu | 2019-12-17 |
| 10475886 | Modified fin cut after epitaxial growth | Fee Li Lie, Soon-Cheon Seo, Raghavasimhan Sreenivasan | 2019-11-12 |
| 10453922 | Conformal doping for punch through stopper in fin field effect transistor devices | Huiming Bu, Fee Li Lie, Tenko Yamashita | 2019-10-22 |
| 10395985 | Self aligned conductive lines with relaxed overlay | Sean D. Burns, Lawrence A. Clevenger, Matthew E. Colburn, Yann Mignot, Christopher J. Penny +2 more | 2019-08-27 |
| 10366928 | Hybridization fin reveal for uniform fin reveal depth across different fin pitches | Zhenxing Bi, Donald F. Canaperi, Thamarai S. Devarajan, Fee Li Lie, Peng Xu | 2019-07-30 |
| 10361207 | Semiconductor structures with deep trench capacitor and methods of manufacture | Kevin K. Chan, Babar A. Khan, Masaharu Kobayashi, Effendi Leobandung, Theodorus E. Standaert +1 more | 2019-07-23 |
| 10332971 | Replacement metal gate stack for diffusion prevention | Takashi Ando, Johnathan E. Faltermeier, Su Chen Fan, Injo Ok, Tenko Yamashita | 2019-06-25 |
| 10326000 | FinFET with reduced parasitic capacitance | Emre Alptekin, Veeraraghavan S. Basker | 2019-06-18 |
| 10312370 | Forming a sacrificial liner for dual channel devices | Huiming Bu, Kangguo Cheng, Dechao Guo, Peng Xu | 2019-06-04 |
| 10276452 | Low undercut N-P work function metal patterning in nanosheet replacement metal gate process | Indira Seshadri, Ekmini Anuja De Silva, Jing Guo, Romain Lallement, Ruqiang Bao +1 more | 2019-04-30 |
| 10269806 | Semiconductor structures with deep trench capacitor and methods of manufacture | Kevin K. Chan, Babar A. Khan, Masaharu Kobayashi, Effendi Leobandung, Theodorus E. Standaert +1 more | 2019-04-23 |
| 10249512 | Tunable TiOxNy hardmask for multilayer patterning | Abraham Arceo de la Pena, Ekmini Anuja De Silva, Nelson Felix | 2019-04-02 |
| 10249753 | Gate cut on a vertical field effect transistor with a defined-width inorganic mask | Brent A. Anderson, Jeffrey C. Shearer, Stuart A. Sieg, John R. Sporre, Junli Wang | 2019-04-02 |
| 10249622 | Epitaxial oxide fin segments to prevent strained semiconductor fin end relaxation | Karthik Balakrishnan, Keith E. Fogel, Alexander Reznicek | 2019-04-02 |
| 10243079 | Utilizing multilayer gate spacer to reduce erosion of semiconductor fin during spacer patterning | Andrew M. Greene, Hong He, Gauri Karve, Eric R. Miller, Pietro Montanini | 2019-03-26 |
| 10242981 | Fin cut during replacement gate formation | Andrew M. Greene, Balasubramanian Pranatharthiharan, John R. Sporre | 2019-03-26 |
| 10242952 | Registration mark formation during sidewall image transfer process | David J. Conklin, Allen H. Gabor, Byeong Y. Kim, Fee Li Lie, Stuart A. Sieg | 2019-03-26 |
| 10224326 | Fin cut during replacement gate formation | Andrew M. Greene, Balasubramanian Pranatharthiharan, John R. Sporre | 2019-03-05 |
| 10211321 | Stress retention in fins of fin field-effect transistors | Gauri Karve, Juntao Li, Fee Li Lie, Stuart A. Sieg, John R. Sporre | 2019-02-19 |
| 10211319 | Stress retention in fins of fin field-effect transistors | Gauri Karve, Juntao Li, Fee Li Lie, Stuart A. Sieg, John R. Sporre | 2019-02-19 |
| 10170581 | FinFET with reduced parasitic capacitance | Emre Alptekin, Veeraraghavan S. Basker | 2019-01-01 |
| 10170471 | Bulk fin formation with vertical fin sidewall profile | Kangguo Cheng, Hong He, Chiahsun Tseng, Yunpeng Yin | 2019-01-01 |